Printed wiring boards (PWBs) have evolved in the direction of higher densities as electronic equipment has become smaller and lighter. These higher densities have been achieved with finer lines and spaces, an increase in the number of layers, and smaller diameters and larger aspect ratios of through holes and blind holes. Electroless copper deposition provides good uniformity of thickness in the plated foil, and high throwing power. For these reasons, electroless copper deposition has become a key technology in manufacturing high-density PWBs.
The characteristics of the electroless copper deposits for foundation are not considered significance, therefore the relationship between the characteristic of the electroless copper deposits for foundation and the reliability to the through hole interconnection is still far from being fully understood. In this study, the relationship between the characteristics of the deposits(the voids existed at deposits, grain size, internal stress and impurity(Cu₂O)) and the reliability to the through hole interconnection were investigated.

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It is known that liquid crystal polymer film exhibits excellent mechanical and physial characteristics compared with those of other polymers. In order to apply LCP film to the printed circuit board, the eching condition on LCP film to obtain good anchor effect for electroless copper plating was studied. After etching LCP film in the 10 M KOH solution at 70 for 60~120 min, the film was catalyzed in the solution containing SnCl2 and PdCl2, where some sorts of surfactant was added. In this study, the effect of surfactant on the adhesion strength was studied, and an excellent adhesion strength using an anionic surfactant could be obtained.

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We developed additive which has good deposition effects to through-hole (deposition effects at corner part) and good filling effects at via-hole.To gain stable filling effects continuously, important factors are control of additive concentration, shape of via-hole, covering power of electroless copper plating at the bottom of via-hole and solution circulation.In this test, we studied reason for decrease in filling effects at mass-production bath and its countermeasure.

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We developed a new flip-chip process called NSD (Non-Conductive Adhesive Stud-Bump Direct Interconnection) method. First, a resin encapsulation sheet is attached to the substrate by heat compression. Stud-bumps are formed on an IC chip by means of conventional wire-bonding technology. The chip is then attached to the substrate. Finally, the encapsulation film is heated and compressed using a heating tool, during which the stud-bumps contact the electrodes on the substrate to form electrical interconnections that follow the substrate warp. When the encapsulation film cools, a compression force is generated between the IC chip and substrate, thus maintaining the interconnections. Highly reliable interconnections were obtained by optimizing the encapsulation film properties using the Finite Element Method (FEM). We report on the relationship among the encapsulation film properties, the reliability and Von-Mises stress amplitude. Applied case to the stacked package and the ultra-thin type module is described.

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When reliability of an electronic equipment is designed, the thig that the life is filled with the cost minimum is demand. However, when the designer designs reliability when a recent, high density mounting and eaeth enviromental harmony type are demanded, an important matter has been overlooked. These problems are pointed out, and the designer is faced to design in consideration of these problems to the reliability design in the future.

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In the flip-chip packages mounted by pressure contact, it is necessary to enhance the interconnection reliability. In this study, we evaluated the interconnection reliability using a contact analysis and we have clarified the dependence of the interconnection reliability on insulated resins of build-up boards.

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Solder connections used in electronic devices have mechanical damage due to the mismatch of the components connected by solders. A reliable method for generating mechanical data of solders is needed, but no reliable method has been proposed. This presentation proposes two standard testing methods for solders, proposed by the committee on high temperature strength of materials, Japan Society of Materials Science. One is the tensile standard testing method and the other is the low cycle fatigue standard testing method. Tensile and low cycle fatigue database of the two solders is also presented.

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Solder connections used in electronic devices have mechanical damage due to the mismatch of the components connected by solders. A reliable method for generating mechanical data of solders is needed, but no reliable method has been proposed. This presentation proposes two standard testing methods for solders, proposed by the committee on high temperature strength of materials, Japan Society of Materials Science. One is the creep and creep rupture standard testing method and the other is the creep-fatigue standard testing method.

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On the high frequency semiconductor package, it is thought that arrangement of FC vamp, BGA solder ball, affects an electrical property. Then, in this paper, in order to grasp the influence quantitatively, (1)when flip chip mounting was performed to a build up board and (2) Build-up BGA was mounted in PCB, (3)when flip chip mounting was performed to Build-up BGA, and it is mounted in PCB, where the number of GND pins to a signal pin or GND pin arrangement is changed in (1) - (3), measurement and the simulation were performed about change of a transmission property.

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We have developed FR-1 material "PLC-2147 RF" which satisfy the requirement for"High heat resistance toward lead free reflow process, migration resistance for silver and punching workability".This improved material will be able to withstand for two times reflow mounting process with lead free solder, although it had been saying that"FR-1"material can't correspond to lead free solder reflow process before. This report describes the feature of FR-1 material"PLC-2147RF"which correspond to lead free solder reflow process.

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