Provider: Japan Science and Technology Agency Database: J-STAGE Content:text/plain; charset="utf-8" TY - JOUR TI - The design of high holding voltage SCR for whole-chip ESD protection TI - AU - Koo,Yong-Seo AU - Lee,Kwang-Yeob AU - Kim,Kui-Dong AU - Kwon,Jong-Ki JO - IEICE Electronics Express VL - 5 IS - 17 SP - 624 EP - 630 PY - 2008 DO - 10.1587/elex.5.624 ER -