Energy Band Diagram near the Interface of Aluminum Oxide on p-Si Fabricated by Atomic Layer Deposition without/with Rapid Thermal Cycle Annealing Determined by Capacitance–Voltage Measurements

We evaluated the fixed charge (Qf) and the interface state density (Dit) from the capacitance–voltage (C–V) measurement before and after rapid thermal cycle annealing (RTCA) using p-type silicon in which the passivation was performed with aluminum oxide (Al2O3) film by atomic layer deposition (ALD). From C–V measurement we obtained the surface potential (VS), accumulation and depletion width, and as a result, energy band diagrams were produced. It was determined that a barrier height of approximately 100 mV was induced by fixed negative charges in the Al2O3 layer near the interface to the p-type Si substrate. The field effect of the Al2O3 passivation layer created by RTCA strongly remains without depending on the gate voltage (VG). [DOI: 10.1380/ejssnt.2012.22]


I. INTRODUCTION
Both monocrystalline and polycrystalline silicon solar cells play an important role in the renewable energy market.A way to increase the sales of solar cells is to reduce the wafer thickness while increasing conversion efficiencies.Since photo-generated charges interact more with surfaces as wafers become thinner, the reduction of recombination losses at these surfaces (surface passivation) gains in importance.To date, the aluminum-alloyed back surface field (Al-BSF) [1] structure has been globally adopted in silicon solar cells.However, this structure is not suitable for thin wafer processing because cells start to bend as the wafers get thinner, which causes cells to break, particularly during module assembly.The Al-BSF structure passivates the rear metal surface reasonably well through an electric field induced by a high-low junction near the rear surface that screens photo-generated minority carriers from interacting with defects at that surface.However, more advanced cell structures that employ dielectric layers reduce recombination by two means: 1) field effects due to embedded fixed charges (Q f ), and 2) a reduction of defects at the dielectric/silicon interface (D it ).The passivation quality of aluminum oxide (Al 2 O 3 ) layers, fabricated by atomic layer deposition (ALD) belong to the best reported solar cells [2][3][4][5][6][7][8], but other deposition methods such as PECVD [9] and RF-sputtering [10] are under investigation and yield Al 2 O 3 layers with similar passivation properties.Owing to its high density of negative fixed charges and low density of interfacial traps, Al 2 O 3 is a particularly interesting candidate for passivate p-type surfaces.For a long time, ALD was char-acterized by a low deposition speed but recently some researchers have reported on its excellent passivation qualities for films deposited by high-throughput ALD methods [11][12][13][14][15].
Two particularly instructive studies that address the recombination velocity on the rear side of silicon solar cells have been published by Aberle [2] and Schmidt et al [5].In these stuides, single layers, as well as stacks of Al 2 O 3 and silicon nitride (SiN x ), are deposited on the full rear surface, while current collection is achieved through point contacts (passivated emitter and rear cell, PERC).This structure results in higher conversion efficiencies than Al-BSF.Accordingly, these researchers achieved low surface recombination by means of field-induced surface passivation due to a high density of negative charges stored at the dielectric/silicon interface.That is, the dielectric films were deposited on p-type silicon and induced the charge accumulation which causes the effective reduction of the surface recombination velocity was anticipated.The band bending due to this negative charge provides as very effective field induced surface passivation with respect to back surface fields (BSF) [3].Therefore, it is very important to precisely determine the barrier height formed by the passivation layer, and to show it by depicting the energy band diagram.
We investigated the interface properties of Al 2 O 3 layers for the BSF by ALD methods without and with rapid thermal cycle annealing (RTCA) in a simple metalinsulator-semiconductor (MIS) structure.The measured capacitance (C) as a function of the applied gate voltage (V G ) of such a device is directly related to the charges (Q f ) and the defects (D it ) near the insulator/semiconductor interface.Apart from these parameters, the capacitance in the vicinity of the surface depends on the dopant density (N sub ) of the silicon substrate, and the accumulation (x a ) or the depletion (x d ) width.However, in order to obtain these parameters, it is essential to establish the relation between the surface potential (V S ), the measured capacitance (C) and gate voltage (V G ) [16,17].Monitoring the surface potential (V S ) as a function of the gate voltage (V G ) and depicting it in an energy band diagram is particularly useful when studying the surface passivation [2,[17][18][19].
In this study, the fixed charge (Q f ) and the interface state density (D it ) were evaluated from the capacitancevoltage (C-V) measurement at high frequency, in comparison with before and after RTCA using a p-type silicon wafer with Al 2 O 3 film that had been deposited by ALD.In addition, an energy band diagram was generated from the surface potential (V S ) and the width (x a , x d ) obtained from the result of the C-V measurement of the MIS structure.We discuss the BSF effect of Al 2 O 3 on the p-Si substrate with reference to comparisons of the energy band diagrams.

II. EXPERIMENTAL A. Sample
A 6-inch crystalline silicon wafer (Okmetic, Vantaa, Finland) produced by the Czochralski method was used.The parameters of the wafer were as follows -p-type (boron diffusion)/orientation ⟨ 1 0 0 ⟩; thickness: 675 µm; resistivity 1-2 Ω cm.The wafer was cleaned using a conventional RCA cleaning (also known as SC1/SC2 etching methods) [20], and was treated in dilute hydrofluoric acid (2%) prior to deposition.Then, the dielectric passivating Al 2 O 3 layer was deposited by ALD (Polygon 8200; ASM International, Almere, Netherlands).In the thermal process, the substrate was alternatively exposed to trimethyl aluminum (TMA) and H 2 O.The substrate temperature was kept at 300 • C. Growth per cycle was approximately 0.1 nm.An Al 2 O 3 layer of 30 nm was deposited on the silicon substrate by means of thermal ALD.Finally, the gate contacts (A = 0.5 mm 2 ) were sputtered through a metal shadow mask.A Silver Leitsilber 200 (Hans Wolbring GmbH, Höhr-Grenzhausen, Germany) was used to ensure good rear side contact of the MIS structure.The structure of the MIS is shown in the insert of Fig. 1.Next, the effect of rapid thermal cycle annealing (RTCA) [21][22][23][24][25][26] was verified by comparing the Q f and the D it .The C-V curves were measured before and after RTCA, which consisted of 3 × 7 minutes (21 minutes in total) of post-deposition annealing on a belt conveyor in an infrared-ray radiation oven in ambient atmosphere at 425 • C. The temperature used in RTCA was decided by this report we referred [6].

B. C-V measurement
The common MIS structure was used to evaluate the capacitance-voltage (C-V) response of the dielectric films.The C-V response is extremely sensitive to the measuring frequency as the contribution of the interface trap states is a function of the measuring frequency.The main advantage of combining both high and low frequency is that all information on Q f and D it can be directly extracted from the measurements [16].In principle, only a simple model is needed in this case.However, the lowfrequency measurement is very sensitive to leakage current [19] and could not be performed on our sample.We measured the current-voltage (I-V) characteristic of our sample, which resulted in a DC current of 0.1 mA when 1 V was applied.This DC current is far greater than the expected displacement currents (pA range) as a result of the slow charging of the measured capacitance (C) which prevents effective filtering of the measurement data.As a consequence, only the high frequency part of the C-V response was used and interpreted according to the commonly used Terman model [16,19,27].
The measurement system was a C-V analyzer (Model 590; Keithley Instruments, Cleveland, OH, United States), set at 1 MHz.This instrument provides highfrequency measurements.The following paragraph explains the different steps to obtain a C-V measurement at high frequency.All parameters applied in this study are shown in appendix A. The method to determine the Q f and the D it from the C-V curve are explained in appendix B.

A. Results of Capacitance-Voltage
High frequency C-V curves from before and after RTCA are shown in Fig. 1.Blue open circles and red solid circles denote before and after RTCA, respectively.The C-V curve is shifted greatly to the positive side compared to before and after RTCA.This suggests an increase of the Q f in the Al 2 O 3 layer, as reported previously [3,4,6,10], though the present sample processing method is different.After RTCA, it was also confirmed that the value of the insulating Al 2 O 3 layer C ins decreased approximately 20 pF, which is agreement with a previous report [3].This suggests a variation in the permittivity, according to an increase in the thickness of the Al 2 O 3 by RTCA and/or the compositional change.In contrast, a substantial change does not accompany the slope of the entire C-V curve that correlates to the interface state density (D it ).That is, affecting to the formed interface state by means of processing did not redound.
The aluminum electrode (M), the aluminum oxide film (I), and the p-type Si semiconductor (S) structural schematics are shown in Fig. 2 and increases considerably by a factor of approximately six before and after RTCA.The barrier height at the interface, which is responsible for field effect passivation, has increased [28].However, the interface state density (D it = 2.0 × 10 12 [cm −2 eV −1 ]) was unchanged.
The Q f and D it might be related to the formation of a SiO x layer between the Si and the Al 2 O 3 as discussed by Benick et al [6]  while the D it as determined by C-V measurements of the MIS structure remained nearly constant [29].Chemical passivation (reduction of D it ) is most frequently achieved by termination of dangling bonds with hydrogen that is introduced during deposition and heattreating [2].Physical passivation is achieved by Q f in the passivating layers.These fixed charges are caused by defects such as K-centers in SiN x [2].According to Agostinelli et al, the negative charges at the Al 2 O 3 /silicon interface are caused by Al ions that are rearranged in tetrahedrally coordinated Al sites with a net negative charge bonded directly to the oxygen atoms of the SiO 2 interfacial layer [3].

B. Construction of the energy band diagram
The band bending in the Si substrate in the energy band diagram can be expressed as follows [18,30]: The amount of band bending in the semiconductor is defined in relation to the displacement from the surface (x) and the surface potential (V S ), the potential at the semiconductor surface relative to that in the bulk substrate.In accumulation or depletion conditions the space charge layer of width x a or x d is inserted, respectively.Both V S and x a (or x d ) are a function of the applied gate voltage (V G ). Detailed descriptions of the band bending in the accumulation condition has been reported previously [30,31].The energy band diagram can be depicted according to the obtained surface potential (V S ) and width (x a or x d ).
The energy band diagram before RTCA is shown in Fig. 3. Surface potential V s = −112 mV and V s = −21 mV at gate voltage V G = 0.0 V and V G = 0.7 V were respectively obtained from equation (B9), shown in Fig. 7 in appendix B. Here, the gate voltage of 0.7 V is the upper limit for the open circuit potential in a single junction silicon solar cell [13].Moreover, the accumulation width (x a ) can be obtained from equation (B11) or Figure 8 because it corresponds to the accumulation condition in this case.The energy band diagram derived from these values is shown in Fig. 3.As shown in Figure 3a, when zero gate voltage is applied (thermal equilibrium condition), a barrier for minority carriers is clearly present.However, at 0.7 V, the barrier is reduced to 21 mV, which is below the thermal energy of the electrons (25 meV).It is possible that no field effect passivation occurs due to the open circuit voltage in the silicon solar cell.
The energy band diagram after RTCA is shown in Fig. 4. The surface potential V s = −144 mV and V s = −142 mV at gate voltage V G = 0.0 V and V G = 0.7 V were respectively obtained from Fig. 7 in appendix B. The barrier height exists clearly regardless of gate voltage, and it is confirmed to appear, and the effect of BSF is shown in Fig. 4 as the energy band diagram.The height of the energy barrier was increased to approximately 30 mV by RTCA, and it was confirmed that the electric barrier persisted in the voltage range investigated.In comparing the pre-and post-RTCA conditions, when the gate voltage was applied at 0.7 V, a barrier height of 121 mV existed by introducing fixed charge in the interface of the Al 2 O 3 and the p-type Si substrate due to the RTCA effect.By extension, the passivation effect of the Al 2 O 3 /p-Si interface due to RTCA will appear while the silicon solar cell is operating under light irradiation.
In this section, we have shown how to construct an energy band diagram near the Al

IV. CONCLUSION
We evaluated the fixed charge and interface state density using the C-V measurement before and after RTCA using p-type silicon in which the passivation was performed with Al 2 O 3 film by the ALD method.Energy band diagrams were produced on the basis of the surface potential, accumulation, and depletion width obtained from the results of the C-V measurement.It was observed that a barrier height (i.e., BSF effect) of 121 mV was created by introducing fixed charge in the interface of the aluminum oxide and the p-type Si substrate by RTCA.The dopant density of the Si substrate (N sub ) is calculated by the slope of the straight line portion(d 1 C 2 /dV ) from Fig. 5, and the substitution for Eq.(B1), The thickness of the oxide film (d ins ), the size of the electrode (A), and the relative permittivity of Al 2 O 3 (ε ins ), known beforehand, are substituted for the following equation: The capacity of the oxide film (C ins ) is calculated.The voltage of the flat band is obtained from the following equation: These values can easily be read from Fig. 5 as voltage shift.
Calculating the P-type Fermi-level distance from the intrinsic Fermi level (ψ B ), The difference between the metal and silicon work function (ϕ ms ), Semiconductor Capacitance [nF] Gate Voltage [V] Calculating the oxide fixed charge (Q f ), First, the capacitance (C) obtained in the C-V measurement was formed with two capacitances (C ins and C s ), The capacitance component that originates in the semiconductor (accumulation, depletion, and inversion conditions) is shown by the following equation: In the high-frequency C-V measurement, C s ≡ −dQ s /dV S is defined as the differential capacitance of the semiconductor.The Al 2 O 3 capacitance (C ins ) can be obtained by the maximum value of the C-V curve in addition to the calculation value.Figure 6 plots the capacitance of the semiconductor (C s ) that depends on the gate voltage (V G ).
Separate calculations for the accumulation and the depletion (and inversion) conditions are performed.
Under the accumulation condition, the relational expression of V Sa is

Region length [nm]
Surface potential [V] In the depletion layer region, the relational expression of Figure 7 plots the surface potential (V S ) that depends on the gate voltage (V G ).
Calculating the width of the accumulation and depletion region (x a and x d ) is considered.Under the accumulation condition, the layer region is calculated as Under the depletion (included inversion) condition the fol- lowing is calculated: These results are plotted in Figure 8.The surface potential is a boundary for zero-potential, and the field length that depends on the surface potential is obtained (x a and x d ).
The gate charge that is applied to the dielectric surface is compensated for by the charge of the interface traps and the semiconductor (due to band bending) as follows: If Q it is a value differs from zero, less charge needs to build up in the accumulation/depletion layer, which results in lowering of the surface potential as compared to the case of zero or fewer traps.As a consequence the C-V curve stretched out as the density of interface traps increases.The following equation (B3) can be performed to calculate D it : where C L is Lindner capacitance, which is an approximation for the semiconductor capacitance [19,32] and ψ S is surface potential converted into energy (i.e.ψ S = q • V s /kT ).Then, the value (ψ B ) related to the Fermi potential and the energy conversion formula (B15) is depicted in the following (this is a p-type semiconductor case), The interface state density (D it ) in the silicon band gap is shown in Figure 9.

FIG. 2 :
FIG. 2: Schematic of the energy band diagram in the flat-band condition

FIG. 8 :
FIG.8: Surface potential vs. the widths of depletion and accumulation region.

FIG. 9 :
FIG.9:The energy distribution of the density of interface state (Dit) in the band gap.