Importance of Advanced Metrology in Semiconductor Industry and Value-added Creation Using AI/ML

a Graduate School of Innovation and Technology Management, Yamaguchi University, 2-16-1 Tokiwadai, Ube, Yamaguchi 755-8611, Japan b Graduate School of Engineering, Osaka University, 2-1 Yamadaoka, Suita, Osaka 565-0871, Japan c Graduate School of Sciences and Technology for Innovation, Yamaguchi University, 2-16-1 Tokiwadai, Ube, Yamaguchi 755-8611, Japan † Corresponding author: kokamoto@yamaguchi-u.ac.jp


I. INTRODUCTION
In 1965, Moore's law was established from a four-point plot of the number of elements per function [1]. It has been in use for over half a century, and simultaneously, the electronics industry has evolved along with The Law of Accelerating Returns (Kurzweil's). Moore's law is based on the concept of transistor miniaturization. By reducing the basic elements such as the gate length of the transistor to 1/k, where k is unitless scaling constant, the device characteristics can be improved, and the number of chips obtained on the Si wafer will be k 2 . This directly results in reduced manufacturing costs.
A representative example that has evolved exponentially as an application of miniaturization is a computer. Computer ownership is now at the individual level, and an advanced computer network environment is firmly established. Further, computers are integrated with the current third generation artificial intelligence (AI) technology, revolutionizing industrial uses. In fact, automated driving technologies, robotization technologies, and image and voice recognition systems are not only changing the lives of humankind but transforming industrial manufacturing and research and development (R & D).
The key to miniaturization is an innovation in optical lithography. The penultimate technology, Projection Reduction Lithography System (Stepper), which uses a 193 nm light (ArF excimer laser), has been applied to integrated circuit (IC) pattern formation, and ultra-miniaturized semiconductor patterns of 28 nm or less have been developed. As of 2019, the design rule of transistor (Logic Industry "Node Range" Labeling) 1.0 nm (2033) is being discussed (note: the physical gate length of the transistor is 12 nm). However, the semiconductor technology based on Dennard's scaling rule [2], which is the guiding principle of miniaturization, has practically declined because of not being compatible with the performance and cost. Furthermore, advanced semiconductor technology manufacturing is at a difficult crossroad centered on the increasing chip cost associated with a smaller process node ( Figure 1); the cost increase is due to chip complexity including IC design [3]. For this reason, applying "advanced integrated metrology" and "AI" in semiconductor processes has been significant.
In this invited paper, we first provide an overview of advanced semiconductor miniaturization from the industry growth curve and confirm the prolongation of technology lifecycle and overall optimization of photolithography (Section II). Next, we present the importance of metrology for optimization (Sections III and IV). Finally, we propose the new world of advanced integrated metrology using AI (Sections V and VI).

A. Growth curve and innovation
As shown in Figure 2, the industry currently forms an s-shaped growth curve (logistic curve) comprising three periods: "Embryo", "Growth", and "Maturity". The maturity period continues to the physical limit which no one overcomes the technical specifications and the industrial infrastructure is aligned along this curve. In general, around reaching the physical limit, new technologies are proposed. One of these technologies will be adopted as an innovation and the industry will become more sophisticated than before. Thus, with all vectors of the infrastructure elements that make up the industry, new technologies penetrate into the industry.

B. Lithography and importance of various metrologies for miniaturization
In the lithography marketplace, many technologies pro-posals such as X-ray exposure, electron beam (fermion) exposure, direct self-assembly (DSA), and nano-imprinting have been developed so far. Optical lithography with the use of light (boson) is still part of the conventional approach on the growth curve. Optical lithography is in its maturity phase; although it has been extended by various creative ideas, the authors have yet to see true innovation. Pattern resolution is based on with 1 as the specific semiconductor process coefficient and the Rayleigh equation indicating the two-point resolution of the optical microscope. The R & D to achieve higher resolution has been promoted with clear guidelines such as increasing the numerical aperture (NA) of the imaging lens, shortening the exposure wavelength , and reducing the process coefficient. The technology that reduces and exposes the reticle (mask) pattern to 4 : 1 is constructed with a photolithographic technology using photons, which improves not only optical performance but also system performance (stage control technology, etc.). It has been achieved through the evolution of various technologies in parallel. At the current exposure wavelength of 193 nm, pure water has a refractive index n of 1.44, and therefore the immersion exposure with NA > 1 (NA = sin , where n is the refractive index, θ the maximal half-angle of the cone of light that can exit the lens) is achieved. Furthermore, multiple exposure [selfaligned double patterning (SADP)] capable of setting 1 to 1/x (where x corresponds to the number of exposures) has been incorporated into practical use. At this time, edge placement error (EPE) for multiple exposures was required by the apparatus as new and essential specifications. In addition, it is highly significant that peripheral technologies such as etching and deposition after pattern formation are highly developed to promote miniaturization. From 2018, the commercial production momentum of extreme ultraviolet lithography (EUVL) with an exposure wavelength of 13.5 nm has increased, and the cumulative number of installations in the cutting-edge IC fabrication lines has reached 40, which is applied to some advanced processors in brand-new smartphones. However, a probabilistic effect that occurs because there are not enough photons for exposure (i.e., the stochastic effect) is also becoming prevalent. Also, the situation where technical development for solving problems and commercialization of mass production flow in parallel are present. Thus, metrology is of extreme importance to advancing miniaturization currently. A nanoscale semiconductor maintains its device characteristics with miniaturization. Hence, the transistor structure must be changed ( Figure 3) [4]. The conventional two-dimensional (2D) (planar) structure shifted to the three-dimensional (3D) structure, and the fin field-effect transistor (FinFET) structure changed to the gate-all-around (GAA) structure. Furthermore, the characteristics of multilayer wiring that connects transistors and intellectual property (IP) blocks are also important to get required performance for nanoscale semiconductors, in addition to the application of materials such as Al, Cu, and Co. Among them, a concept of design for manufacturability (DFM) was conceived for efficient and effective manufacturing. In the field of photolithography, source mask optimization (SMO) and computational lithography (CL) were developed to optimize the reticle (mask) and exposure conditions to create exposure patterns. Furthermore, to support the scaling technologies, 3D-IC has emerged using precision wafer stacking [5] and other technologies, in which the stacking wafers' interface characterization is extremely crucial. Beyond GAA, various device candidates have been proposed wherein the transis-tors incorporate new materials such as carbon nanotubes and transition metal chalcogenides such as MoS 2 . In addition, Interuniversity Microelectronics Centre (IMEC) has proposed design technology co-optimization (DTCO), which supports the miniaturization manufacturing cost and yield improvement from the design side, and system technology co-optimization (STCO), which has been extended to the device system considering various factors of IC including implementation. Times have shifted from partial optimization of individual elemental technologies to total optimization of the entire system. The importance of metrology technology was discovered as part of the evolution to global optimization.

III. METROLOGY REQUIREMENT IN SEMICONDUCTOR
Traditionally in IC fabrication process, metrology, such as inspection, analysis, and measurement processes, was considered to be unnecessary and something that did not add value; however, for advanced nanometer-scale semiconductors metrology had to be actively incorporated into the manufacturing process to improve semiconductor yield and production efficiency. It is linked to the electrical testing of devices along with discussions on the applicability to next-generation devices.

A. High precision and stability of manufacturing equipment
In optical lithography, Zernike polynomial investigation and wavefront aberration measurement of an optical imaging system is vital to achieve the desired high resolution. Likewise, multi-axis interferometer measurement as an apparatus system is important to achieve high throughput and high position accuracy simultaneously. In addition, the absolute value of grid distortion is measured at high speed and with high accuracy for all wafers before exposure; the correction value is fed forward to the lithography system to maintain throughput and greatly improve overlay accuracy.
In a particular cutting-edge system, the overlay accuracy (single-machine overlay, SMO: machine-to-self overlay accuracy) between the same units is <1.5 nm when the processing capacity is >275 wafers h −1 (96 shots), which contributes to shortening the lead time for semiconductor manufacturing using metrology and data analysis. As shown in Figure 4, the metrology and data analysis contribute to (1) R & D phase: Shortening of R & D turnaround time by providing a rapid proof-of-record proposal using accurate simulation; (2) ramp-up phase: shortening of ramp-up time because of the reduction of machine differences and the enhancement of adjustment functions; and (3) high volume manufacturing phase: Improving productivity/stability and yield using preventive maintenance, failure detection, and process adjustment functions via monitoring and analysis functions. As a means of stabilizing manufacturing quality with higher accuracy, the challenge of advanced equipment control/advanced process control (AEC/APC) using statistical analysis technology continues. To satisfy several nanometer-scale control accuracies, it is necessary to build a very robust model because of the accuracy and amount of data for model construction required, in addition to characteristic quantities specific to semiconductor manufacturing. In semiconductor devices, not only has the stabilization of semiconductor manufacturing quality using actual process data in the semiconductor production line, but also the scope of the application of AI technology been expanded to determine the manufacturing conditions that are the basis of the manufacturing process.
B. Stability of the manufacturing process Figure 5 shows the metrology requirement for the current FinFET structure and future GAA. It is critical to measure the morphology of the transistor microstructure, the variability of pattern dimensions, composition of constituent materials, stability, doping amount of the channel region, defects, strain, and so on. One of the objectives to confirm whether the expected device structure is fabricated is to extract the correlation among every measurement item. Furthermore, for the current IC packaging process, it is more complex and difficult to manufacture with a goal of ever fewer or even zero manufacturing defects. These requirements and challenges can increase development times, production risks, and manufacturing costs. Better metrology such as inline inspection and process control tools can help stabilize the manufacturing process. Currently, new x-ray technology has been developed specifically for advanced packaging, which detects subtle process changes that affect yield and reliability.

C. Stability of the production line
Sensors are installed is all equipment to constantly measure their status and the data help "visualize" all processes in the factory from R & D to high volume manufacturing (HVM). Further, the data increase the pace of improvement by rotating the plan-do-check-act (PDCA) cycle for issues that occur in the factory. In advanced semiconductor production lines, there are demands for automated systems that enable thousands of state-of-the-art semiconductor equipment and tens of thousands of lots.
Recently, digitized big data has been promoted to improve operational efficiency by utilizing AI with machine learning  and deep learning. The realization of a smart factory for more advanced business is a key to including factory environmental measurements for severe contamination control, and metrology is also important here to keep the device performance. The critical particle size of electrically active particles (based on 50% width of fin logic SiGe) was 3.5 nm after 2019. In addition, 10 nm particle monitoring in ultra-pure water (UPW) is required, and the roadmap for metallic contamination in image sensors indicates a 0.05 ppm requirement. A new concept of "proactive yield management" using data analysis is proposed for yield enhancement [4].

IV. METROLOGY INDUSTRY
This section describes the global market and characteristics of the metrology industry. According to the Japanese Ministry of Internal Affairs and Communications (JAIMA), the production value of manufacturing equipment is 124 trillion yen, whereas the analytical instrument market is as small as 216.2 billion yen (only 0.2%). On the other hand, demand in the global market is up to 14.1 billion United State dollars (USD) in North America (the US and Canada), accounting for 34.5% of the total demand in the world. This is followed by the European market (~11.4 billion USD, 28.0%) and Japan (~4.7 billion USD, 11.5%); the Chinese market (~4.4 billion USD, 10.8%) is close to that of Japan. The Japanese market has a large demand for electron microscopes, optical microscopes, and X-ray photoelectron spectroscopy (XPS); however, in the Western and Chinese markets a high proportion of the sales market is life sciences.
Next, we investigate the characteristics of the metrology industry using the Herfindahl-Hirschman Index (HHI), which is a measure of the size of firms in relation to the industry and an indicator of the amount of competition among them, using where is the market share of firm i in the market and N is the number of firms. The results are provided in Table 1.
A small value of the HHI index less than 1500 in general indicates a competitive industry with no dominant players [6]. The results indicate an index of more than 2500 for metrology instruments; therefore, it can be said that the market in this field is an oligopoly, and new entry may be difficult. However, based on the verification of patent application statuses, there are few applications related to AI, and the advanced integrated metrology proposed later is in the embryo period; it is expected to create a new market, which is not done by anyone till date. Table 2 summarizes the semiconductor process metrology described in Section III.B that produces nano-scale semiconductor microstructures [7]. There are three areas: (1)  OM; optical microscopy, CD-SEM; critical dimension-scanning electron microscopy, AFM; atomic force microscopy, STM; scanning tunneling microscopy, SAXS; small angle X-ray scattering, AES; Auger electron spectroscopy, EPMA; electron probe micro analyzer, EDX; energy dispersive X-ray spectroscopy, EELS; electron energy loss spectroscopy, XRF; X-ray fluorescence, RBS; Rutherford backscattering spectrometry, SIMS; secondary ion mass spectrometry, AOI; automatic optical inspection, ICP-MS; inductively coupled plasma mass spectrometry, TXRF; total reflection X-ray fluorescence, SCM; scanning capacitance microscopy, EBIC; electron beam induced current, CBED; convergent-beam electron diffraction, XRD; X-ray diffraction, EBSD; electron backscatter diffraction, OBIRCH; optical beam induced resistance change, OBIC; optical mean induced current inspection technology, such as defects and quality inspection in the manufacturing process; (2) 2D-and 3D-shape measurement technology, and (3) analysis technology to measure semiconductor characteristics, including physical and chemical analyses for pollution control to maintain. Many of these technologies have been proposed as individual technologies. In advanced metrology, causal processing of big data is required, and the application of AI is indispensable. Furthermore, in advanced semiconductor lines, AI application areas have been strengthened to prediction and judgment, leading to automatic control of manufacturing systems.

V. ADVANCED INTEGRATED ME-TROLOGY
To achieve the unmet tight specifications for semiconductor manufacturing, we propose "advanced integrated metrology," as shown in Figure 6. This metrology requires the development of optimal AI for the enormous amount of data supplied from each technology. It is also important to develop operations that can naturally incorporate the metrology equipment that AI can leverage. Improving the performance of individual devices has traditionally been for business competition reasons, but it is necessary to consider a new value of connecting each metrology device. In particular, it is necessary to demonstrate the value of a solution that includes data that were not detectable in the past; a solution that goes beyond the framework of metrology devices, such as automation, learning functions, and data extraction of areas that were not detectable in the past. This can trigger a paradigm shift in the metrology field.
When considered in the conventional metrology fields, application of AI from the common viewpoint of data such as "waveforms," "images," and "signals," are required in the electron/optical microscope, charged particle beams application fields such as synchrotron radiation, neutrons, nuclear magnetic resonance (NMR), and mass spectrometry. Although it has already been applied to individual research studies using the open-source system, there is no argument on the examination of the optimal algorithm, data collection, and validation of the results for solutions to meet social requirements for integrated measurement. The vector, including the immaturity of AI as a library, has not been determined, and it is important to extract basic and fundamental issues.

VI. VALUE-ADDED CREATION IN AD-VANCED INTEGRATED METROL-OGY
We investigate the perspective of Japan's uniqueness to the evolution of nanometer scale semiconductors with the help of domestic experts in the R & D committee of the Japan Society for the Promotion of Science (JSPS). The reliability and credibility of data are crucial to metrology. In this respect, the machine-and deep-learning of the AI evolves a black-boxed character and does not necessarily match the direction of the integrated metrology that clarifies the measurement and analysis process.
In image analysis, a correct answer is required first. As described before, in the waveform analysis, a scenario where the true value is better than noise is needed. Although there are human judgments, it is necessary to extract issues to provide an optimal solution and specific prescription for AI operation to improve the reliability of the integrated metrology.
Previously, image analyses of microstructure photographs obtained via several tools was a methodology used to incorporate integrated metrology with AI operations. For example, damage to conventional materials is a vital and valuable research subject; however, this damage is a heterogeneous phenomenon considering crack initiation and propagation and the occurrence of voids and decohesion under the influence of the fracture.
Therefore, a suitable solution for this heterogeneous problem will become available if the microstructure images obtained using different experimental tools such as a transmission electron microscope, a scanning electron microscope, an optical microscope, SIMS, and SAXS, are combined and discussed by researchers from different scientific fields.
In semiconductors, metals possessing low resistance (Cu and Co) are used as the interconnection material. As these materials are formed by electroplating, physical properties including packing density and fracture mode are considerably different from those of bulk systems.
In general, the fracture mode is discussed based on the morphology of the fracture surface. However, the relationship between observed fracture surfaces and their bulk microstructure has not been clearly understood. As a new methodology, AI technology was first used to categorize fracture morphology and its feature characteristics [8]. The ductile fracture is one fracture mode that appears when an excessive load is applied to a metal material with relatively large elongation, such as Cu or Al at room temperature. It has a characteristic in that a hole-like pattern of "dimples" is observed on a ductile fractured surface. As an example of the methodology shown in Figure 6, we attempt to apply AI to the SEM image analysis of the fracture surface. We chose a representative example of an inhomogeneous structure of bulk structural materials. In the case of steel (Fe), which is similar to Co and Cu metals, the fracture surface is changed with temperature ( Figure 7). Here, the key is if the difference in dimples with temperature change can be predicted/recognized by AI, then the source of the dimple expression can be understood.
For this experiment, however, we consider representative examples of important heterogeneous structures in bulkbased structural materials. The application of AI to fracture surface SEM image analysis has already started; this is an analysis of a ductile fracture surface of the steel. Here, the difference in the fracture surface shape (dimple) when the temperature is changed cannot be predicted and observed by AI, and the source of dimple expression could be under-stood.
The neural network used for this work is VGG16 [9], which is a basic 16-layer convolutional neural network proposed at the 2014 ImageNet Large Scale Visual Recognition Challenge. Using two types of SEM images, 30 fracture surface images both at room temperature and at −100°C were prepared and processed. The aim of the experiment was to confirm whether AI could determine the differences in the fracture surfaces between different temperatures. In addition, data augmentation by a generative adversarial network (GAN) [10] was performed. GAN uses two neural networks called generator and discriminator. The generator learns to create fake images that are similar to genuine images, while the discriminator learns to classify the two images. The generator aims to minimize the following loss function to trick the discriminator.  where, ( ) is an arbitrary probability distribution, e.g., uniform distribution, ( ) is the output of the generator (fake image), and (•) is the output of the discriminator that shows the probability that the input is genuine. The discriminator aims to maximize the following loss function to correctly classify genuine and fake images.
where, data ( ) is a genuine data distribution. The experiment was implemented by two steps: one is the data augmentation by GAN and another is the learning and classification by VGG16. The flow of these two steps is shown in Figure 8.
Step 1: The original images (1280 × 960 pixels) were randomly cut out at 256 × 256 pixels and their sizes were increased to 100 times (6000 images). Next, the 3000 room temperature images and 3000 −100°C images were respectively learned by deep convolutional GAN (DCGAN) [11] to generate fake images. The number of obtained images was 5000, and some of them are shown in Figure 9.
Step 2: Training data for VGG16 were prepared. A total of 29 images were then selected from 30 original room temperature images and 29 images from 30 −100°C images as training data (a total of 58 training images). Then, we randomly cut out the training images at 224 × 224 pixels and their sizes were increased to 100 times (5800 images); hereafter, these 224 × 224 pixels images are called the region of interest (ROI) images. The reason we cut the images at 224 × 224 pixels is that VGG16 used in this study has been pretrained on ImageNet data with 224 × 224 pixels. Finally, VGG16 was trained on 5800 genuine ROI images and 5000 fake images. The 5000 fake images were also randomly cut out at 224 × 224 pixels. One room temperature image and one −100°C image that were not selected as training data, were used as testing data. The testing images were also cut out at 224 × 224 pixels; however, the cut-out images did not overlap each other. Thus, we obtained 1200 ROI images as testing data. The classification result for the testing data shows that room temperature and −100°C images could be classified with a classification accuracy of 67.5%. The precision and recall for each class are summarized in Table 3. The results of Table 3 were obtained by 30-fold cross-validation. Thus, when comparing three-dimensional dimple structures from 2D SEM images, it is interesting to identify a ductile fracture surface at room temperature and at low temperature using AI. Figure 10 shows an example of the prediction results obtained by VGG16 for a room temperature image. The base area represents the prediction of room temperature, while the blue area surrounded with dots represents the prediction of −100°C. As machine learning-including neural networks-is based on probability theory, some areas with a low probability of room temperature were misclassified. From Table 3, however, it is clarified that the neural network can classify the differences in the fracture surface images between the room and low temperatures.
If such research continues and the analysis technology matures, it will be possible to apply the "micro"-structural analysis to "macro"-phenomena. As a next step, atom-  ic-scale structural analysis will be applied to AI. We believe that we are close to an era when AI will be used to conduct thorough technical analyses of heterogeneous phenomenon from the macro to the micro and nano scales. Finally, we consider the systematization of metrology equipment. While there is a movement to create a "common format" for measuring devices, it is important to exchange data in different formats within the company or between related specialized fields. To overcome this challenge, the concept of a new protocol system is proposed here. For example, if the SEM data of a company (or research institution) is shared using the new protocol and someone rewrites it with more accurate data, it will be more useful if the system is understood by everyone. Further, it is possible to propose a mechanism that improves the quality of the analyzed data. We recognize this as a new research direction in the metrology field caused by systemization.

VII. CONCLUSIONS
An overview of the evolution of semiconductor miniaturization was given based on the latest information, and the importance of metrology was described from the direction of overall optimization. Here, we introduced a new idea of advanced integrated metrology and introduced new value creation efforts by combining AI. According to Semiconductor Equipment and Materials International, the semiconductor market exceeded the 400 billion USD (~44 trillion yen) for the first time in 2017. The expansion of demand for semiconductors due to the further evolution of IoT, Big Data, and AI is thus obvious. A new way of advanced integrated metrology can be considered as an important role for the fabrication of next generation ICs.