An SET hardened dual-modular majority voter circuit for TMR system

抄録

A Triple-modular redundancy (TMR) system will have a failure if Single Event Transient (SET) faults affect the voter. In this paper, we propose a full SET-tolerance dual-modular majority voter (DMV) circuit for all internal nodes. The DMV consisting of two simplex-modular voters, two inverters, a C-element inverter and a weak keeper is implemented in CMOS 40nm technology. A novel XOR gate and a multiplexer based voter is also presented and used as a simplex-modular voter so that the whole DMV can be implemented by 40 CMOS transistors. A novel C-element weak keeper is also proposed to reduce power consumption. Monte-Carlo simulation results show that power consumption of DMV only increases by 11.09% compared to that of a single traditional voter.