IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
LETTER
An efficient digital calibration technique for timing mismatch in time-interleaved ADCs
Chen HongmeiJian MaochenYin YongshengLin FujiangCui Qing
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JOURNAL FREE ACCESS

2016 Volume 13 Issue 13 Pages 20160524

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Abstract

An efficient digital calibration technique for timing mismatch in time-interleaved ADCs is presented. It depends on the phase detection between a reference clock and the sampling clock of each sub-ADC in TIADC system. A method of variable delay line is used to compensate the timing mismatch. The mismatch detection and compensation form a feedback loop and can achieve a real-time tracking and correcting. Simulation results showed that this technique can have the timing mismatch calibrated quickly and correctly within the entire Nyquist sampling frequency by the virtue of a smaller hardware, and can be applied to any number of TIADC.

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© 2016 by The Institute of Electronics, Information and Communication Engineers
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