IEICE Electronics Express
Online ISSN : 1349-2543
LETTER
Additive-calibration scheme for leakage compensation of low voltage SRAM
Chunyu PengXiangwen AnZhiting LinXiulong WuWei Hong
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JOURNALS FREE ACCESS

2016 Volume 13 Issue 18 Pages 20160720

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Abstract

As the bit-line leakage increases, the performance of SRAM will decline. Especially, the read operation will even fail when the amount of the leakage reaches a critical value. In this paper, we present a new technique, called Additive Calibration (AC), which can combat the bit-line leakage problem even in low voltage. Simulation results show that the maximum tolerant bit-line leakage current of our AC scheme is increased by 45.6% compared with the previous X-calibration scheme. Thus, this method can perform at higher frequency with much lower power consumption.

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© 2016 by The Institute of Electronics, Information and Communication Engineers
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