BARR: Congestion aware scheduling algorithm for Network-on-Chip router

Abstract

Scheduling algorithm is crucial to the performance of the Network-on-chip router. Different from traditional scheduling algorithms that concentrate on local fairness, we propose a congestion-aware scheduling algorithm based on input buffer of downstream router. The scheduling algorithm keeps a match dynamically between input and output by detecting the flits number to be transferred in the same packet. It can reduce network congestion especially under heavy traffic loads. Compared to RRM and iSLIP algorithm, the new scheduling algorithm can increase the saturation throughput by 8.2% and reduce the average communication latency by 7.8% under non-uniform traffic.