A 0.75 V reference clamping sense amplifier for low-power high-density ReRAM with dynamic pre-charge technique

Abstract

There are two major challenges in developing the sensing circuit for ReRAM in deep submicron technologies, including: 1) the reduced sensing margin (SM) due to the lowered supply voltage (VDD). 2) the degraded read access pass yield caused by the increased process-voltage-temperature (PVT) variations. A Reference Clamping Sense Amplifier (RC-CSA) with Amplifier Assisted load PMOS and Dynamic Pre-charge circuit is proposed to deal with these two challenges. Simulation results show that the RC-CSA is able to provide over 200 mV SM with VDD down to 0.55 V, and capable to work with a large bit-line loading (4096 cells per BL). The typical read yield is 99.9% for 32-Mb macro with sensing time of 4.6 ns under 0.75 V VDD. Overall, RC-CSA is very suitable for low-VDD and high-density applications.