A polynomial based valley search algorithm for 3D NAND flash memory

抄録

Valley search aims to find the updated optimal read reference voltage (OPT) that minimizes the raw bit error rate (RBER). In this paper, a valley search algorithm is proposed, which can accurately find the OPT after five read operations through a simple calculation based on cubic polynomial approximation, without traversing all the read voltages between two adjacent program states. Experimental results of TLC chip show that the raw bit error rate after applying this valley search scheme is reduced to 0.183%, which is within the error correcting capability of LDPC (8763, 8272) error correcting code (ECC).