Theoretical estimation of current imbalance in multichip power module using resistance matrix

Abstract

This paper describes a theoretical method to estimate the current imbalance based on the resistance matrix in a multichip power module. It is derived that the current through each device can be calculated based on the terminal voltage, the resistance matrix of the module, and the on-resistance of each device. The resistance matrix of the module can be easily obtained using parasitic extraction simulation tools. By using circuit simulations for 4-, 6-, and 12-parallel module structures, it is confirmed that the proposed method can accurately estimate the current imbalance.