IEICE Electronics Express
Online ISSN : 1349-2543
LETTER
Energy efficiency of scratch-pad memory in deep submicron domains: an empirical study
Hideki TakaseHiroyuki TomiyamaGang ZengHiroaki Takada
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Volume 5 (2008) Issue 23 Pages 1010-1016

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Abstract

As the technology scales down to the deep submicron domain, the leakage energy in memory devices could contribute to a significant portion of the total energy consumption. Therefore, evaluation of energy consumption including the leakage energy is necessary. In this paper, we investigate the effectiveness of scratch-pad memory on energy reduction considering both the dynamic and leakage energy. The experiments are performed for 65nm, 45nm, and 32nm technologies. The results demonstrate the effectiveness of scratch-pad memory in deep submicron technology. It is also observed that the leakage energy becomes less significant along with the technology scaling.

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© 2008 by The Institute of Electronics, Information and Communication Engineers
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