IEICE Electronics Express
MH4 : multiple-supply-voltages aware high-level synthesis for high-integrated and high-frequency circuits for HDR architectures
Shin-ya AbeYouhua ShiMasao YanagisawaNozomu Togawa
Author information
JOURNALS FREE ACCESS

Volume 9 (2012) Issue 17 Pages 1414-1422

Details
Download PDF (461K) Contact us
Abstract

In this paper, we propose multiple-supply-voltages aware high-level synthesis algorithm for HDR architectures which realizes high-speed and high-efficient circuits. We propose three new techniques: virtual area estimation, virtual area adaptation, and floor-planning-directed huddling, and integrate them into our HDR architecture synthesis algorithm. Virtual area estimation/adaptation effectively estimates a huddle area by gradually reducing it during iterations, which improves the convergence of our algorithm. Floorplanning-directed huddling determines huddle composition very effectively by performing floorplanning and functional unit assignment inside huddles simultaneously. Experimental results show that our algorithm achieves about 29% run-time-saving compared with the conventional algorithms, and obtains a solution which cannot be obtained by our original algorithm even if a very tight clock constraint is given.

Information related to the author
© 2012 by The Institute of Electronics, Information and Communication Engineers
Previous article Next article

Recently visited articles
feedback
Top