Microprocessors optimal power dissipation using combined threshold hopping and voltage scaling

Abstract

The rapid growth in microprocessor’s performance increases the power consumption significantly, resulting in rising microprocessor and system temperatures. High temperatures and eminent thermal variations of processors create severe challenges in system reliability, and cooling costs. Therefore, power and thermal management have become prominent issues of portable computer systems. Dynamic threshold hopping and supply voltage scaling (DTSVS) is an effective low-power design technique for reducing dissipated power. The technique adjusts the body bias (V_BB) or threshold voltage (V_th) and, correspondingly, the supply voltage (V_dd) adaptively in order to obtain a minimum power consumption and extend the processor’s lifetime on a revolutionary scale. In this study, the optimal simultaneous combination set of the threshold and supply voltage (V_th-V_dd) scaling is proposed to reduce power dissipation in the core of high-performance portable processors. Analysis and SPICE simulations are used to evaluate the presented theoretical basics and fundamentals. To ensure optimal V_th-V_dd sets; Particle Swarm Optimization (PSO) algorithm and Pareto Front (PF) solution are used. Both theoretical and simulation results show that, optimal amount of power consumption reduction has been obtained for different temperatures and workload environments.