IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543

この記事には本公開記事があります。本公開記事を参照してください。
引用する場合も本公開記事を引用してください。

VP-Router: On Balancing the Traffic Load in On-Chip Networks
Zicong WangXiaowen ChenJunyang ZhangYang Guo
著者情報
ジャーナル フリー 早期公開

論文ID: 15.20180883

この記事には本公開記事があります。
詳細
抄録

Along with the scaling up for network-on-chips (NoC), the network traffic grows increasingly, and generally the central region is easily to become the traffic hotspots. The problem of unbalanced traffic can lead to a part of network links becoming the bottleneck of network communication, and thus hurt the network and system performance. In this paper, we propose load-balanced link distribution method, which is intended to allocating physical channels according to the traffic load on each link. To support connecting multiple physical channels between two routers, we propose a novel concept of virtual port, and design a low-cost multi-port router called virtual port router (VP-Router). Compared to the network with traditional routers, the network with VP-Routers can effectively balance the network traffic load on links. The experiments with SPLASH2 benchmarks exhibit that VP-Router performs 6.3% and 9.0% better in energy-delay-product (EDP) for 4 × 4 and 8 × 8 mesh networks respectively. As for system throughput, VP-Router improves by about 3.5% and 5.8% on average respectively.

著者関連情報
© 2018 by The Institute of Electronics, Information and Communication Engineers
feedback
Top