Efficiency Improvement and Torque Ripple Reduction by High-Speed PMSM Drive System Implemented in FPGA

Abstract

Permanent magnet synchronous motors (PMSMs) have been used in numerous applications due to their many attractive characteristics, such as high power, high efficiency, and wide operating-speed range. Moreover, high-speed PMSM drive systems are used in various applications. In recent years, such systems have become much smaller and have come to have a higher power density. Because of the increase in the motor fundamental frequency in the high-speed region, it is necessary to reduce the control period. Conventionally, digital signal processors and microcomputers have been used for high-performance processers. The field-programmable gate array (FPGA) which is a logic-integrated circuit can also reduce the control period simply because of fast hardware performance. This paper proposes a high-speed PMSM drive system based on direct torque control (DTC) implemented in an FPGA. In this paper, the operating characteristics of the proposed system using a PMSM having a rated speed of 42,000 min^-1 are showed. Furthermore, the effects of efficiency improvement and torque ripple reduction are examined experimentally.