2019 年 139 巻 1 号 p. 36-42
A technique to improve the power efficiency of switched capacitor DC-DC converters, which reuses the charge of parasitic capacitance in the circuit, has been reported. In this research, the charge recycling method is applied to the DC-DC converter derived from continued fraction expansion and the conversion efficiency is discussed. Simulation was performed using 0.18µm CMOS process parameters for verification. Adiabatic operation of the proposed circuit can be confirmed from simulation results.
J-STAGEがリニューアルされました! https://www.jstage.jst.go.jp/browse/-char/ja/