電気学会論文誌C(電子・情報・システム部門誌)
Online ISSN : 1348-8155
Print ISSN : 0385-4221
ISSN-L : 0385-4221
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非2進展開に基づくAD変換器のデジタル回路部面積削減手法
進藤 佑司瀬戸 謙修傘 昊
著者情報
キーワード: AD変換回路, 高位合成
ジャーナル 認証あり

2019 年 139 巻 1 号 p. 76-82

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抄録

We propose an area reduction method of digital circuit part in β-expansion-based analog-to-digital converter (ADC). The digital parts of conventional β-expansion based ADCs use lookup table (LUT) to estimate effective β values, and to convert non-binary digital output from analog part to binary code. Unfortunately, increasing the conversion resolution (bit number) of the ADCs increases the chip area of the LUT. In this work, we estimate the effective β values by Newton's method and directly convert non-binary numbers to binary numbers without LUTs. As a result, when the conversion resolution of the ADCs is increased, the proposed method reduces the increase of the digital part area compared to the conventional LUT-based method.

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