スケーラブルなゲート経由量子ビット読み出しに向けたクライオCMOS高感度容量計

抄録

For scalable semiconductor-based quantum computer, integration of qubit, electrometer and readout circuit on CMOS platform needs to be explored. Here, for qubit readout, the use of charge-based capacitance measurement (CBCM) is proposed to detect the atto-farad change in the gate input capacitance of single-electron transistor (SET) electrometer. Mixed SET-CMOS circuit simulation revealed that a few hundred microvolts signal appeared at the integration capacitance at 1MHz data rate and the gate capacitance profile with respect to the gate voltage was successfully reproduced.