論理信号のアンダーシュート発生機構に関する一考察

抄録

Waveform distortion of logic signal, by accelerating clock speed and improving implementation density, makes non-linear output for the input and has been giving behavioral problem to electronic system. There are overshoot type, hysteresis type, and undershoot type for transient waveform distortion. Deep undershoot could cause latchup for CMOS logic IC, data destruction for DRAM, pulse split for TTL IC, respectively. Undershoot of logic signal is not discussed only by transient phenomena (time domain ) but also by filter theory ( frequency domain). Time sequential resistance R variation by output circuit impedance variation causes such time domain variations as damping constant α and damping coefficient ζ. While resistance R variation causes Q variation in frequency domain. In this paper, an occurrence mechanism is shown that undershoot occurs when parasitic series resonance circuits are composed at load side of driving device and damping coefficient ζ varies time sequentially for totempole or complimentary circuits. PSpice simulation suggests that undershoot is reduced by controlling the phase of punch through current.