IEEJ Transactions on Industry Applications
Online ISSN : 1348-8163
Print ISSN : 0913-6339
ISSN-L : 0913-6339
Paper
A Method for Reducing the Dead-Time Voltage and Impedance Voltage in a Series Voltage Compensator
Atsushi NakataMasahiro NozakiAkihiro ToriiAkiteru Ueda
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2011 Volume 131 Issue 10 Pages 1225-1231

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Abstract

Many research groups are developing series voltage compensators. In the series converter, since a transformer is used in series in the power system, the power system current flows into the voltage source inverter through the transformer. The inverter current, which is determined by the transformation ratio, gives rise to an error voltage that consists of a dead-time voltage and an impedance voltage; the error voltage is generated even when the reference voltage is zero. This paper describes the generation mechanism of the error voltage and proposes a method for reducing the error voltage.

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© 2011 by the Institute of Electrical Engineers of Japan
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