IEEJ Transactions on Industry Applications
Online ISSN : 1348-8163
Print ISSN : 0913-6339
ISSN-L : 0913-6339
Paper
Novel Technique to Reduce Capacitor Currents in DC link of PWM Double Inverters with Current Sensors in Series with Low-Side Switches
Tatsuya MoriKichiro Yamamoto
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2018 Volume 138 Issue 12 Pages 933-943

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Abstract

This paper proposes a technique to reduce capacitor currents in the dc link of PWM double inverters with current sensors in series with low-side switches. In the proposed technique, the phase difference between carrier signals in each inverter of the PWM double inverters is set to 180 degrees, and the voltage references of double inverters are shifted in accordance with the difference between the voltage reference of the medium value and that of the minimum value. The conventional and proposed technique are compared using the experimental results. Compared to the conventional technique, the proposed technique can reduce capacitor currents in the dc link of double inverters, while maintaining the harmonics of the inverter output current.

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© 2018 by the Institute of Electrical Engineers of Japan
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