Intelligent Image Sensor Chip with Three Dimensional Structure

Kang-Wook Lee; Tomonori Nakamura; Katsuyuki Sakuma; Nobuaki Miyakawa; Hiroaki Shimazutsu; Ki-Tae Park; Hiroyuki Kurino; Mitsumasa Koyanagi

doi:10.11485/itetr.24.27.0_35

24.27

Session ID : IPU2000-29/CE2000-8

DOI https://doi.org/10.11485/itetr.24.27.0_35

Conference information

Intelligent Image Sensor Chip with Three Dimensional Structure

Kang-Wook Lee, Tomonori Nakamura, Katsuyuki Sakuma, Nobuaki Miyakawa, Hiroaki Shimazutsu, Ki-Tae Park, Hiroyuki Kurino, Mitsumasa Koyanagi

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Abstract

A new three-dimensional(3D)integration technology based on wafer bonding technique has been proposed for intelligent image sensor chip with 3D stacked structure. We have developed key technologies for such 3D integration. A 3D image sensor test chip was fabricated using this 3D integration technology. Basic electric characteristics were evaluated in the 3D image sensor test chip.

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