ITE Technical Report
Online ISSN : 2424-1970
Print ISSN : 1342-6893
ISSN-L : 1342-6893
26.63
Session ID : IPU200273
Conference information
A CMOS PLL Clock Generator Using a Source-Voltage Controlled Oscillator (S-VCO)
Tomochika HARADATadayoshi ENOMOTO
Author information
CONFERENCE PROCEEDINGS FREE ACCESS

Details
Abstract

A source voltage-controlled oscillator (S-VCO), whose oscillating frequency f is controlled by a source voltage of MOSFET, has been developed. A phase-locked-loop (PLL) clock generator incorporating the S-VCO was fabricated by using 0.6-μm 2-poly 3-metal CMOS technology. The number of MOSFETs in the S-VCO is about 1/2 that in a conventional current-starved VCO. The voltage sensitivity of a fabricated 43-stage S-VCO with a single 3.3-V power supply (VD) is approximately 70.3 MHz/V. At 50.0 MHz oscillation and 3.3V power supply, the measured jitter was 418 psec (2.09 %).

Information related to the author
© 2002 The Institute of Image Information and Television Engineers
Previous article Next article
feedback
Top