2019 年 23 巻 1 号 p. 42-51
The faults in through-silicon via (TSV) have a critical impact on the reliability and yield of a three-dimensional integrated circuit (3-D IC). With the significant increase in the number of TSVs used in 3-D IC, the testing of TSVs for manufacturing faults poses certain serious challenges especially weak fault testing, and therefore it is important to have effective Design-For-Test (DFT) techniques. In this paper, we present a method for TSV testing using multi-tone dither signal, based on electrical characteristic analysis. This method mainly observes the differences in the root mean square (RMS) value of the output signal voltage between faultless and faulty TSV circuits to detect manufacturing faults, and uses only passive components such as metal lines, without consuming additional power for the testing. With regard to the common manufacturing faults such as voids and pinholes, the electrical characteristics of faulty TSVs are modeled and analyzed, and analytic equations of the faults, which are based on characteristic parameters, are explored. The ground-signal-TSV (GS-TSV) equivalent electrical model with manufacturing faults is simulated and tested by using a multi-tone dither test signal, which is generated by modulating an RF signal with an optimized multi-tone signal. The peak-to-average ratio (PAR) is used as the test evaluation parameter to determine the type and size of the fault. The simulation results demonstrate the effectiveness of the multi-tone dither test method in the detection of voids (as low as ohm level) and pinholes (up to mega ohm level). It is obvious that this method performs better in the diagnosis of weak manufacturing faults in TSVs.