エレクトロニクス実装学会誌
Online ISSN : 1884-121X
Print ISSN : 1343-9677
ISSN-L : 1343-9677
サブトラクト法における配線ピッチと銅層許容厚さの実験的考察
山本 拓也中野 修平澤 裕片岡 卓
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2000 年 3 巻 3 号 p. 228-233

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Most of the printed circuit boards are produced by subtractive method. In order to achieve fine lines & spaces (under L/S=50/50μm) by subtractive method, it is essential to reduce thickness of copper. This paper describes an experimentally obtained relation between allowable thickness of copper and pattern pitch on subtractive processing. Empirical formula were introduced to simulate the progress of etching. Simulated result showed good conformance with actual etched pattern. To form fine lines & spaces of under L/S=50/50μm, copper foil of thinner than 5μm is needed.

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