Transactions of The Japan Institute of Electronics Packaging
Online ISSN : 1884-8028
Print ISSN : 1883-3365
ISSN-L : 1883-3365
Technical Papers
Advanced Plating Photoresist Development for Semiconductor Packages
Hirokazu SakakibaraHisanori AkimaruAkito HiroKeiichi SatoKoichi FujiwaraKenji OkamotoShiro Kusumoto
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2016 Volume 9 Pages E15-007-01-E15-007-06

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Abstract

In recent years, novel electronic products like mobile phones, tablets, and personal computer have shrunk dramatically and become highly functionalized. To satisfy these market trends of smaller thinner devices, packaging technologies such as 3D-TSV, 2.5D, PoP and Flip-chip wafer bumping are being used. We have developed negative tone resists for re-distribution layer, C4 and micro bumps. Our resist is negative tone resist which incorporates an acrylate cross-linker system with photo radical initiator. This formulation shows excellent chemical resistance to various plating solutions such as Cu, Ni, Sn/Ag and Au, with good stripability. The key technology of plating resists for advanced packages is high resolution, allowing for high aspect ratio patterning capability that covers a wide range of film thicknesses. An example of such applications is in advanced PoP package design which require a thick film material that has high resolution capability, along with high aspect ratio performance. Additionally, high resolution re-distribution layer resists can be used to create fine pitch conditions which are necessary for package downsizing. Our resist shows good patterning performance from below 10 μm to above 100 μm film thickness conditions. In this paper, material design and key properties of novel plating resist with high resolution and high aspect ratio performance with a wide range film thickness ranges are discussed.

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© 2016 The Japan Institute of Electronics Packaging
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