This paper proposes a multi-partitioned chip for a dual-conductor bubble memory and describes its characteristics. By use of n-1 parallel slots (n; the number of partitions), the conducting sheet of the chip is cut into a meandering strip. So the current required for bubble propagation decreases to 1/n and the chip resistance increases by a factor of n2, as confirmed by experiments on large-scale models. The chip can be matched to the drive circuitries by selecting the partition number n. As the slots also divide a minor loop into the smaller ones, a true swap gate is essential to the chip. Two types of true swap gates as well as a block-replicate gate are proposed in this paper. The operations of these gates are discussed using the results measured on scale-up models. The chip organization is changed by a gate control method, e. g. when the swap gates, classified according to the parity of slot number, are controlled independently, minor loops are equivalent to bubble ladders. So the multi-partitioned chip can be adapted to various applications.