2019 年 8 巻 5 号 p. 205-212
Power devices are often sealed either silicone gel or epoxy resin including silica filler to prevent chip and joints from chemical and mechanical stress. To reduce the stress and strain at both Si chip and solder joint, a novel structural model that a thin interlayer having low elastic modulus was inserted between sealing resin and Si chip was proposed. It was revealed that the polyester-modified epoxy resin exhibited lower Young’s modulus at 25℃ and 125℃ than that of the epoxy resin, and it could be expected as the interlayer. The interlayer was shown to have an optimum thickness in terms of the stress on the chip and the thermal resistance of the module. The validity of these structural analyzes was shown by simple experiments.