高誘電率ゲート絶縁膜技術の課題と動向

抄録

This paper briefly reviews challenges and prospects for high-κ gate dielectric technology, mainly focusing on the fundamental material properties. First, we need to understand the origin of high dielectric constant of those materials, and then we can consider some material engineering such as the dielectric constant improvement as well as overcome drawbacks such as the fragile reliability, on the basis of mechanisms giving rise to the high dielectric constant. From the device performance point of view, the mobility and threshold voltage controls are necessarily required for employing high-κ materials in actual ULSIs. It is also discussed that the gate electrode selection is very important as well as the high-κ gate dielectrics in terms of the Fermi level pinning. Finally, it is emphasized that the material scalability applicable for a couple of technology nodes should be taken into account for the material selection.