Journal of the Visualization Society of Japan
Online ISSN : 1884-037X
Print ISSN : 0916-4731
ISSN-L : 0916-4731
Efficient Processing of Pixel Data Utilizing CPU-Register-Width
Motonobu YOSHIMOTOTomomasa UEMURAMakoto KIMURA
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1995 Volume 15 Issue Supplement2 Pages 253-256

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Abstract
The present algorithm aims to make use of wide register-width of recent microprocessois, for digital image processing. It offers simultaneous processing method of multiple pixel data which are packed in a long register.
In this paper, a simultaneous subtraction algorithm is explained first, then some examples are shown to prove. the effectiveness of the method. As applications of the algorithm, a new binarization method and simultaneous calculation of four absolutes differences. are proposed. For the four-pixel simultaneous binarization, the computation time becomes half comparing to that of an ordinary method. For the latter .calculation, it is shorten only 10% in the worst case, and 40% in the best condition. The performances are varies depending on an operating system and CPUs.
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