Abstract book of Annual Meeting of the Japan Society of Vacuum and Surface Science
Online ISSN : 2434-8589
Annual Meeting of the Japan Society of Vacuum and Surface Science 2019
Session ID : 1Bp05
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Heterogeneous-integration technologies and wafer-level packaging
*Hideki HiranoShuji Tanaka
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CONFERENCE PROCEEDINGS FREE ACCESS

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Abstract

The down-scaling of integrated circuits is approaching economical and technological limits, and thus diversification is expected as another growth direction, so called “More than Moore”. For the diversification of microelectronics, integration with other kinds of components, i.e. heterogeneous integration, is one of promising approaches. This paper reports wafer-level heterogeneous integration and packaging technologies based on a wafer-to-wafer bonding process which enable the combination of dissimilar materials and components into single systems and hermetic packaging at a same time.

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© 2019 The Japan Society of Vacuum and Surface Science
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