Abstract
This paper presents a 32-channel compressive gammachirp filterbank chip based on hybrid stochastic/binary computation for area/power-efficient auditory signal processing. The gammachirp filter well expresses the performance of human auditory peripheral mechanism and can be used for hearing assisting devices and noise robust speech recognition systems. The stochastic gammachirp filters are designed using cascaded digital IIR filters, leading to area-efficient hardware thanks to a simple logic-gate implementation of multiplication. However, the signal variability due to random number sequences used in stochastic computation induces unwanted frequency components at each IIR filter, causing large noise signals at the output of the gammachirp filters. To reduce the noise signals, a fixed random-number-generation (FRNG) technique is introduced that provides the same random number sequence at every operation as opposed to different random number sequences used in a conventional stochastic filter. The FRNG technique mitigates the noise signals and hence increases the filter gains with short lengths of stochastic bit streams. In addition, gain-compression characteristics depending on input acoustic pressures known as human auditory effects are naturally realized by changing the lengths of the stochastic bit streams. The proposed filterbank chip is fabricated using Taiwan Semiconductor Manufacturing Company (TSMC) 65 nm CMOS process that achieves 715-2,585 µW with the chip area of 3.2 mm2, leading to the best power-area product per channel in comparison with conventional analog auditory filterbanks.
