IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Online ISSN : 1745-1337
Print ISSN : 0916-8508
Special Section on VLSI Design and CAD Algorithms
A 65-nm CMOS Fully Integrated Shock-Wave Antenna Array with On-Chip Jitter and Pulse-Delay Adjustment for Millimeter-Wave Active Imaging Application
Nguyen Ngoc MAI KHANHMasahiro SASAKIKunihiro ASADA
Author information
JOURNALS RESTRICTED ACCESS

2011 Volume E94.A Issue 12 Pages 2554-2562

Details
Abstract

This paper presents a 65-nm CMOS 8-antenna array transmitter operating in 117-130-GHz range for short range and portable millimeter-wave (mm-wave) active imaging applications. Each antenna element is a new on-chip antenna located on the top metal. By using on-chip transformer, pulse output of each resistor-less mm-wave pulse generators (PG) are sent to each integrated antenna. To adjust pulse delays for the purpose of pulse beam-forming, a 7-bit digitally programmable delay circuit (DPDC) is added to each of PGs. Moreover, in order to dynamically adjust pulse delays among eight SW's outputs, we implemented on-chip jitter and relative skew measuring circuit with 20-bit digital output to achieve cumulative distribution (CDF) and probability density (PDF) functions from which DPDC's input codes are decided to align eight antenna's output pulses. Two measured radiation peaks after relative skew alignment are obtained at (θ; φ) angles of (-56°; 0°) and (+57°; 0°). Measurement results shows that beam-forming angles of the fully integrated antenna array can be adjusted by digital input codes and by the on-chip skew adjustment circuit for active imaging applications.

Information related to the author
© 2011 The Institute of Electronics, Information and Communication Engineers
Previous article Next article
feedback
Top