Etching Technologies for 2 nm Node Logic Devices

Abstract

GAA (Gate All Around) FETs have been developed for 2 nm-generation logic devices. This paper discusses key etching challenges and technologies for the device, Si/SiGe nanosheet etching with H₂ gas chemistry using a Microwave ECR etching tool, reduced WFM (Work Function Metal) erosion and enhanced nano-space etching capability in WFM patterning through DC pulse technology, and HK (High-K)/WFM recess etching employing an ALE (Atomic-Layer Etching)-like approach with boron deposition control. Additionally, this paper demonstrates conformal ALE of Si₃N₄ in nanoscale spaces using a Dry Chemical Removal (DCR) tool equipped with an IR lamp.