A recursive approach for the compensation of the ionospheric phase contamination is proposed based on multistage Taylor expansion and the extended Kalman filter. The proposed algorithm can dynamically compensate the ionospheric phase contamination. We show by numerical examples that the proposed algorithm outperformances the conventional methods such as the polynomial phase signal (PPS) and the singular value decomposition (SVD).

View full abstract

We propose a technique to reduce the number of data converters in multiple-input multiple-output (MIMO) systems. While the conventional MIMO systems require the same number of data converters as that of antennas, the proposed method requires only one high speed data converter and one analog switch, regardless of the number of antennas. Hence, the power consumption and implementation area can be reduced. The experiment results confirm the effectiveness of the proposed technique.

View full abstract

This paper presents a guideline for determining an adequate position and orientation of a stirrer. A stirrer is used to improve a uniform electric field on a working volume inside a reverberation chamber (RC). An efficient stirrer is expected to change boundary conditions and field characteristics such as magnitude and direction, so as to improve the uniform electric field. To determine an adequate installation location of a stirrer, we have analyzed efficiency of two kinds of stirrers with different shapes, and measured field uniformities. Efficiency of each stirrer has been investigated in terms of the number of independent samples that the stirrers can provide, and E field strengths and powers in the working volume measured in order to investigate the field uniformity. Measurement results show that the field uniformity and the stirrer efficiency are deteriorated by STD 0.8 dB and 20% point, respectively, when the stirrer is located less than λ_LUF/4 close to any chamber wall and in a parallel orientation with the wall. Hence, it is recommended that a stirrer should be installed in a position > λ_LUF for the field uniformity and < 2λ_LUF for a large working volume, and in an orientation to avoid a parallel angle with the ceiling or any wall.

View full abstract

A controllable injection diode (CID) is proposed for reducing switching loss and a novel controllable carrier-injection mechanism (CCIM) is investigated in the new device. The CCIM reveals that due to the limit carrier lifetime, the carrier-injection can be controlled in one narrow-pulse time. Based on the CCIM, the CID takes advantage of a PiN diode and a junction field-effect transistor (JFET) for modulating the forward voltage drop. The simulation results show that the forward voltage drop can be modulated to 0.54 V at minimum by the carrier-injection enhancement at 45 A/cm². On the other hand, the JFET weakens carrier-storage effect in the i-layer and the reverse recovery time of the CID is about 0.27 µs at rectifying 50 kHz, which is sufficiently faster than 1.1 µs of the conventional diode. Therefore, the switch loss of the CID can be decreased in a DC-DC buck converter.

View full abstract

The pulse inversion averaging (PIA) method is introduced to the shadowgraph imaging system to visualize the second-harmonic component of the ultrasonic field. The principle of the PIA method is summarized and the method is customized for observing an second-harmonic ultrasonic field. An experiment of a shadowgraph with PIA using a 1-MHz concave focused transducer is conducted to evaluate the system. The fundamental component of 1 MHz is suppressed more than 30 dB with respect to the second-harmonic component. With this system, both a normal shadowgraph image and a second-harmonic image are visualized in real time.

View full abstract

We propose a simplified theoretical model to analyze the absorption coefficients in quantum dot intermediate band solar cell (QD-IBSC) structure. Our theoretical model, based on the multiband tight-binding Hamiltonian including the conduction, valence, and the intermediate band, can capture some essential features in the actual QD-IBSC such as the absorption path dependence of the absorption strength and the line shape of the absorption spectrum in spite of its simplicity. The main feature of this model is its ability to be applied to any QD-IBSC system regardless of the geometrical parameters (QDs shapes and spacing) or the base materials by changing the relevant coupling parameters. The proposed simplified should be of useful for the semi-quantitative understanding and modeling of QD-IBSC.

View full abstract

A Contourlet transform, an expansion of a wavelet transform, is a double filter bank structure composed of Laplacian Pyramid and directional filter banks. Several wavelet filters of preferable performance have been developed for wavelet transforms, e.g. CDF (Cohen, Daubechies and Feauveau) 9/7 filter. However, there is still only a limited number of wavelet filters applicable for Contourlet transforms. Therefore, it has become an urgent issue to find effective contourlet filters and design methods in the field of multiscale geometric analysis. In order to design a new directional filter bank for Contourlet transforms, this paper uses parametric modeling to obtain a novel PKVA (See-May Phoong, Chai W. Kim, P. P. Vaidyanathan, and Rashid Ansari) filter, by first implementing Chebyshev best uniform approximation, and then reaching the optimal solution by means of Parks-McClellan algorithm. Using Brodatz standard texture image database for test images, and using image denoising treated with hidden Markov tree (HMT) models in the Contourlet domain, the optimal PKVA filter was obtained on the basis of the peak signal to noise ratio (PSNR) maximum criterion with human visual properties considered. Experiment results show that the image denoising performance of our filter is better than that of Po and Do’s. The PSNR obtained from the experiment is 1.011449 higher than that of Po and Do’s in average. Therefore, Contourlet transforms using the proposed PKVA filter as DFB can ensure that the local error in images is of a uniform minimum value, and that good overall visual effect can be achieved.

View full abstract

This paper presents a cascaded-type multilevel inverter whit only one DC voltage source, which uses a floating capacitor to feed the other cascaded H-bridge, the capacitor is charge in a bootstrap technique and then the converter can provide a peak voltage equal to twice the DC-source regard-less on the power factor in the load, the converter is ideal for renewable systems applications as inverter stage in energy generation or grid integration, experimental results with a 5-level prototype verify the converter behavior.

View full abstract

A compact planar multiband antenna for 3G/4G mobile terminals is presented. The proposed design consists of a Sierpinski Gasket fractal geometry perturbed according to a Particle Swarm optimization (PSO) strategy in order to operate in advanced wireless services (AWS-1, 1710–1755 MHz, 2110–2155 MHz) and worldwide interoperability for microwave access (WiMAX, 3300–3600 MHz) bands. Numerical and experimental results assess the effectiveness of the proposed prototype in its multiband operations fitting the project constraints.

View full abstract

The impact on the nominal power pattern of random and not a-priori known errors affecting the excitation amplitudes of real linear arrays is analyzed by means of an analytic approach based on the interval analysis math. Starting from the expressions of the pattern bounds as a function of the excitation tolerances modeling the saturation in the amplifiers of the array feeding network, the effects on the radiation characteristics and the pattern descriptors are evaluated.

View full abstract

A compact and low-power design of a 12-bit binary-weighted current-steering DAC is presented. Instead of 4096 unit current cells, the proposed design uses 192 unit current sources with two reference currents. The silicon area of the generation circuit of two reference currents is very compact as well. The area of the total current source arrays is smaller than four times the area of 6-bit current source arrays, which has significantly reduced the dimension of the analog part of a conventional 12-bit DAC. The proposed DAC achieves 400 MS/s update rate and consumes 38.7 mW from single 1.8 V supply.

View full abstract

To improve the arithmetic performance of the conventional bit-stream squarer circuit based on sigma delta (ΣΔ) modulation, the method of bit translation is proposed. In addition, the original bit-stream squarer inside the bit-stream square root circuit is replaced with the proposed bit-stream squarer to reduce the arithmetic operation error. The performances of the proposed bit-stream squarer and square root circuit were verified through the simulation in MATLAB. Compared with the conventional circuits, the proposed circuits can increase the calculation accuracy significantly.

View full abstract

A single ended primary inductor converter (SEPIC) converter based light emitting diode (LED) power supply, which can achieve power factor correction (PFC) and constant-current driver for the LED in the critical conduction mode, is presented in this paper. The circuit principle is described in detail. Meanwhile the formulas for metal-oxide semiconductor field-effect transistor (MOSFET) switch-on time, switching frequency and the main influences of power factor are given. Experimental results show that the power can drive the LED with high efficiency in virtue of its high power factor, low power loss and stable output. Furthermore, it can be applied to low power lighting occasions with the simple structure and the high reliability.

View full abstract

A novel compact defected ground structure (DGS) common mode filter is proposed, which adopts only two C-shaped DGS and has only a small size of 7.5 mm by 10 mm. It adopts two-pole structure to achieve wide stopband and adopts method of smooth transition at the junctions of DGS between the slit and the square to improve the depth of stopband. The filter provides over 15 dB common mode suppression from 3.7 GHz to 9.8 GHz, while the differential signals still keep good signal integrity. Simulated and measured results are well agreed.

View full abstract

A 2 × 50 AlGaN/GaN High Electron Mobility Transistor (HEMT) is designed and fabricated with 0.1 µm gate-length and 2 µm source-drain distance in the paper. The maximum frequency of oscillation (fmax) may reach 177 GHz. The small signal equivalent circuit model is obtained by using the open-short test structure and reverse cut-off method. A novel large signal model is constructed based on the SDD form. The new I-V and C-V expressions are proposed to complete nonlinear fitting accurately by contrasting the measure results of the GaN HEMT. The convergence of the model is good during the harmonic balance simulation. So this modeling method can be applied to millimeter-wave GaN HEMTs.

View full abstract

The Breadth First Signal Decoder (BSIDE) algorithm can be expressed as tree searching class of algorithm that does not require an estimate of SNR and provides an optimal BER performance. However, the average number of nodes to be searched by BSIDE in a tree is more that leads to higher implementation complexity. In this letter, a sign prediction technique exploited over the similarity property of QAM that reduces the computational complexity of the algorithm without any degradation in the performance is proposed. Simulation results show that the approach with sign prediction reduces 50% reduction in computational complexity compared to BSIDE for 2 × 2 and 66% for 4 × 4 MIMO systems.

View full abstract

A modification of the conventional Flipped Voltage Follower (FVF) to enhance its output resistance is presented. It consists of replacing the conventional cascoding transistor of the basic cell by a regulated cascode scheme. This decreases the output resistance by a factor g_mr_o approximately, the gain of a transistor as an amplifying stage. This is achieved with only two additional transistors and a biasing current I_B, offering a significant advantage with respect to other previously reported architectures that require considerably increased power consumption and number of devices. Simulation results in 0.5 µm technology show an enhancement factor of 16, approximately, with respect to the conventional FVF, resulting in an output resistance of 3.1 Ω. Additionally, the proposed follower was implemented in a winner-take-all circuit to prove its functionality; simulation and experimental results confirm the proposed operation.

View full abstract

A low-power clock and data recovery (CDR) circuit using dynamic current-mode logic (CML) latches followed by a V/I (Voltage to Current) converter merged with XOR for half-rate linear phase detection is described. The loop latency of the CDR is also reduced with the proposed scheme. Thus the faster locking time and jitter reduction could be achieved compared to the CDR using conventional static CML latches and XOR gates in a linear phase detector (PD) followed by a V/I converter. A CDR circuit with the proposed circuit topology has been designed and fabricated with 0.18-µm CMOS technology and has shown 5-Gb/s data recovery with 14.9 mW power saving compared to the conventional CDR structure under a 1.8-V supply

View full abstract

This paper presents a low-power half-rate clock-embedded transceiver architecture that employs quarter-rate multiplexing/de-multiplexing circuit technique, low-Vdd current-mode driver topology embedding half-rate clock, and multi-functional injection-locked oscillator (ILRO) for a digital clock and data recovery (CDR) design. The whole transceiver circuit was simulated in 65 nm CMOS process and its feasibility was proved successfully operating at 10 Gb/s across a band-limited channel. The achievable power efficiencies of the receiver and transceiver were 0.7 mW/Gb/s and 1.1 mW/Gb/s respectively.

View full abstract

A 3.8-MHz Wien-bridge oscillator is designed in low-cost 0.35 µm CMOS process. The amplifier gain control is done by MOS capacitors rather than by more nonlinear MOS resistors. A differential amplitude control loop controls two MOS capacitors in differential manner, which greatly reduces the feedback loop bandwidth without using any off-chip filters, hence almost completely eliminate the unwanted operating point disturbance of the oscillator core. The fabricated chip consumes 0.22 mA from 2 V supply, and shows −41.1 dB of second harmonic component and −94.3 dBc/Hz phase noise at 100 kHz offset.

View full abstract

Practical class-E power amplifier circuits with shunt capacitance have been increasingly exploited in wireless power transmission systems for efficiency enhancement. Most designs, however, have often assumed that the shunt capacitance is linear and the maintainable efficiency in the low power supply has received little attention simultaneously. In this paper, we propose a class-E design with a shunt capacitance composed of nonlinear and linear capacitances, which was implemented and measured with 92.5% Power-Added Efficiency (PAE) at 13.56 MHz operating frequency and 4 W output power level. In addition, an adaptive bias control circuit that drives the drain voltage of power amplifier was realized to up-hold high PAE at a lower input power range.

View full abstract

A low-power fast-transient on-chip low-dropout regulator (LDO) using advanced dynamic biasing circuit is presented in this paper. The proposed advanced dynamic biasing circuit is composed of an advanced dynamic biasing current generator and a related slew rate enhancement circuit. The advanced dynamic biasing current generator boosts the bias current of the LDO momentarily during the transient state through coupling the output voltage spike. In addition, the slew rate enhancement circuit, which utilizes the dynamic biasing current, suppresses the output voltage spike with an automatic on/off feature. From the Hspice simulation results, the output voltage is regulated at 0.8 V from a 1-V supply voltage. The output voltage recovers within 1.4 µs at a voltage spike less than 80 mV for load current switching from 50 µA to 100 mA with 300-ns rise and fall time.

View full abstract

This paper presents a suboptimum custom-tailored (SCT) model for power amplifiers (PAs). Based on the pruned Volterra series, the SCT model is developed by using a recursive optimum-term selecting (ROS) algorithm with an offline characterization process. The proposed model sacrifices accuracy in comparison with the custom-tailored (CT) model derived from the general Volterra series. But the former is still available, while the latter becomes unobtainable, as nonlinearity order and memory length increase. Further more, the proposed model inherits the merit of high efficiency from the base model. Simulation results show that it performs well in the time and frequency domains.

View full abstract

Brillouin scattering in perfluorinated graded-index (PFGI-) polymer optical fibers (POFs) has been extensively studied for structural health monitoring, including seismic diagnosis. Here, we measure the propagation loss of PFGI-POFs at telecom wavelengths as a function of large applied strain (up to 100%) at three optical powers and as a function of strain rate at a constant optical power. The strain dependence of the propagation loss in PFGI-POFs is found to be independent of the incident power (<27 dBm) and the strain rate (<500% s⁻¹), indicating that PFGI-POF-based Brillouin sensors are potentially applicable to actual seismic monitoring.

View full abstract

This paper presents the topology selection, design and experimentation of LCC resonant converter with isolated transformer for constant current source. Possible LCC topologies are classified based on the number of elements contribute to the dynamical change in energy. Topologies suitable for constant current source are selected based on the source/sink combination. The current gain transfer function is obtained for the selected topologies using sine-wave approximation method. The LCC resonant converter behaving as a constant current source when operated at a particular resonant frequency is selected. The expressions for converter current gain, component stresses, and the condition for optimized converter design for minimum size of resonant tank is derived. Experimental results of the converter show that Zero-voltage switching is achieved and is suitable for constant current power supply.

View full abstract