This letter presents a low-complexity semi-systolic array implementation for polynomial multiplication over GF(2^m). We consider finite field Montgomery modular multiplication (MMM) based on two-level parallel computing approach to reduce the cell delay, latency, and area-time (AT) complexity. Compared to related multipliers, the proposed scheme yields significantly lower AT complexity.

A simple current-reversible chaotic jerk circuit is proposed and particularly demonstrates the use of inherently tanh(x) nonlinearity of a single opamp for a chaotic jerk circuit. No additionally nonlinear devices are required. Bifurcation is electronically tunable through a current source in a reversible direction. The largest Lyapunov exponent of either direction forms mirror images, whereas the chaotic attractor of either direction forms anti-symmetric images.

A D-band divide-by-6 injection-locked frequency divider (ILFD) is presented. The basic mechanism of high division ratios frequency divider is investigated. The circuit employs a wideband microstrip Lange coupler, a microstrip delay line and a pair of Cascode transistors to form a feedback loop for enhanced divide-by-6 operation. The proposed ILFD is fabricated with chip size of 0.7 × 0.9 mm² in a 0.13 µm SiGe HBT technology. The losses of WR-6 waveguide and 170-GHz probe in measurement setup are calibrated accurately by employing the open-short-load approach in a terminated two-port network. Through varying the operating voltage, the free-running oscillation frequency of the circuit can be changed, which results in an effective frequency-division locking range of 135 to 150.2 GHz while consuming 5.25 to 14.4 mW including the output buffer amplifier. A phase noise of −121.58 dBc/Hz at 1 MHz offset is achieved at 150.2 GHz.

A new topology is proposed to achieve a spread-spectrum clock generator. It employs a new modulation filter, consisting of two capacitors and a resistor. The modulated triangular waveform is formed at the center of the control voltage coming from the segregated PLL. A definite advantage is that the spreading behavior does not affect the bandwidth of the PLL. Moreover, the modulation filter consumes smaller chip area because a larger resistor can be utilized for the required bandwidth.

According to the energy variation of the mechanical transmission in the process of circuit breaker operation which is characterized by acoustic and vibration signals, a new method of high Voltage circuit breaker mechanical fault diagnosis was proposed in this paper. This method combined Density Peaks Clustering Algorithm (DPCA) fused Kernel Fuzzy C Means (KFCM) and support vector machine (SVM). It is an intelligent method of double clustering. Vibration and acoustic signals are decomposed by Local Mean Decomposition. Three product function components with the largest correlation of the original signal are filtered. And the characteristic entropy can be extracted by approximate entropy. DPCA is utilized to get the best peak density clustering decision and optimize the initial clustering center of KFCM. The fault training samples is pre-classified and input SVM. And the fault classification result of the circuit breaker can be received by mesh optimization algorithm. Finally, the DPCA-KFCM and SVM method in the fault diagnosis of the circuit breaker is verified by the typical failure test of the circuit breaker, the loosening of the pedestal and the refusal of the circuit breaker, which improve the accuracy of the fault diagnosis greatly.

Some nonvolatile phase change memory (PCM) cells with 80 nm heating electrodes are found early RESET failure. The causes, which result in the early failure of the PCM, have been studied. Compared the energy dispersive X-ray spectroscopy (EDS) results, it is observed some segregation has occurred in the components at the positions close to the TiN and bottom electron contact (BEC) interface for the early failed cells. The main causes are considered to be the unstable interface between the Ti-rich TiN and the Ge₂Sb₂Te₅ (GST-225) layers and the inconsistent manufacturing process. Thanks to the segregation, the chemical components of the material close to BEC in the early failed cells are found changed. The changed material is taken as the immediate reason for the RESET failure, which has been confirmed by a two-dimensional finite analysis.

We propose two novel ways to alleviate the reverse conducting insulated gate bipolar transistor (RC-IGBT) snapback phenomenon by introducing the floating field stop layer with a lightly doped p-floating layer and recess structure at the backside. The floating field stop layer is submerged in the N-drift region and located several micrometers above the P⁺ anode region, which would not degrade the blocking capability but can suppress the snapback phenomenon effectively. When the collector length exceeds 100 µm, the snapback voltage ΔV_SB of the floating field stop RC-IGBT with the p-floating layer can be less than 0.5 V. Furthermore, the recess structure at the backside can separate the N⁺ short and P⁺ anode region, which will be beneficial to eliminate the snapback. Finally, an RC-IGBT with a floating buffer layer and recess at the backside is proposed. Compared to the RC-IGBT featuring an oxide trench between the N⁺ short and P⁺ anode, the proposed one has utilized the simple recess structure to replace the costly oxide trench and achieved the identical characteristics simultaneously.

Physical unclonable functions (PUFs) are the circuits that extract a number of unique chip signatures determined by random physical variations from fabrication. Since they are able to securely store and generate secret keys, PUFs allow to bootstrap the hardware-based implementation of an information security. This manuscript proposes a novel ternary content addressable memory based PUF (TCAM-PUF) for secure embedded systems. The PUF responses are simulated under various conditions, which are start-up values of TCAM cells. The results show that the proposed TCAM-PUF provides higher reliability and uniqueness than SRAM-PUF, which is one of the widely-used memory cell-based weak PUFs. According to our simulation, our TCAM-PUF provides an inter-chip and intra-chip hamming distance of 49.5% and 3.5% (on average), respectively and uniformity of 49.8% (on average).

An efficient class-AB OTA with enhanced output current, slew rate, open loop gain, and gain bandwidth is presented. The circuit is based on a class-AB input stage with adaptive biasing, and an output stage with dynamically biased cascode transistors. It can deliver output currents 100 times larger than the bias current with a total quiescent power dissipation of 72 µW. Measurement results of a 180 nm CMOS test chip prototype show slew rate, gain bandwidth, and open loop gain enhancement.

A linearized tuning varactor for the voltage controlled oscillator (VCO) is proposed in this paper. The capacitance-voltage (C-V) curve is linearized by combining an accumulation MOSFET (AMOS) and PMOS in parallel to form the varactor. Two ring voltage controlled oscillators (ring VCOs) are fabricated and measured with a standard 65-nm CMOS process. They are both identical except for the varactor. The first VCO uses the proposed varactor, and the second one is tuned by a conventional AMOS-only varactor for reference. The ring VCO with the proposed varactor operates from 500.5 to 807.6 MHz, and the VCO gain (K_VCO) varies from 183 to 284 MHz/V. Comparing the reference VCO with the AMOS-only varactor, the measured K_VCO variability is reduced by 82%. The phase noise is between −89 dBc/Hz and −92 dBc/Hz at 1 MHz offset while dissipating 0.8 mA from a 1.2-V supply.

Selector is indispensable to suppress leakage current for crossbar array of resistive random access memory. According to the nonlinear requirement, electron tunneling mechanism is firstly attempted. However, earlier studies discovered drawbacks of insufficient current density. This work aims at exploring the idealized characteristic of selector based on Fowler-Nordheim tunneling mechanism by selecting various materials and structures. Thereinto, current density transforms to drive voltage according to corresponding current density standard. Simulation results indicate that metal/insulator barrier and insulator thickness play key roles in determining drive voltage and nonlinearity of the tunneling selectors. Specifically, metal/insulator barrier influence drive voltage and nonlinearity, while insulator thickness mainly influence drive voltage. Thus it can help comprehend restrictions of tunneling mechanism and attempt other improvement directions.

In this paper, a digital step X-type attenuator with low process variations is demonstrated using 90 nm CMOS technology. The X-type attenuator uses MOSFETs as voltage controlled resistors, which influenced by process parameters. And a compensation circuit associated with the threshold voltage is employed to mitigate the process influence. The attenuator have a maximum attenuation range of 32 dB with 0.5 dB steps. The rms amplitude error and rms phase error are 0.42 dB and 3.1° over 23.5–30 GHz respectively, and the insertion losse is 9.77 dB at 25 GHz. The core chip size is 0.48 mm².

Chip temperature and energy consumption become one of the most critical design issues with technology scaling to nanometre-scale, especially for NoC systems with large number of cores and shrunken core size. To balance the temperature and energy consumption on NoC-based multi-cores system, this paper proposes an efficient NoC mapping approach in which the hyper-heuristic algorithm based on genetic operators (HAGO) is the core of this approach. Compared to simulated annealing algorithm and genetic algorithm, HAGO demonstrates a faster convergence speed and excellent stability. Experimental results show that our proposed mapping approach can make a better balance between energy consumption and temperature, which reduces the peak temperature from 365.2 K to 352 K and only increases the energy consumption by 1.12%.

An implantable flexible filter is proposed in this paper. The defected ground structure is used to make the filter more compact. The pass band of the implantable filter is 5–7 GHz, and the measured minimum insertion loss is 0.84 dB and the return loss is better than 21 dB. The bending behavior of the filter is analyzed, and the insertion and return loss are consistent well with the flat. The implantable flexible filter has advantages in compact size and low loss. There will be good application prospects in implantable transceiver module and biomedical detection.