To solve the coordinated optimization of dynamic response, steady-state accuracy and chattering suppression in PMSM speed control, an INISMC—ADSTA strategy is proposed. Its nonlinear piecewise sliding mode surface alleviates the conflict between integral saturation and dynamic performance, while the adaptive super-twisting reaching law achieves fast convergence and chattering suppression. Verified by Lyapunov stability analysis, finite-time convergence proof and DSP experiments, the strategy optimizes multiple performance indicators coordinately with strong disturbance rejection, outperforming traditional methods.

This study addresses the core challenge of output optical frequency and wavelength instability in semiconductor lasers within high-precision quantum sensing systems, which is caused by drive current fluctuations and operating temperature drift. A dual-channel, high-precision current drive and temperature control system was successfully developed. The drive circuit employs a Howland circuit, which integrates an adjustable current-limiting protection circuit based on a comparator and DAC. This effectively reduces circuit noise and allows for the flexible setting of current-limiting thresholds to accommodate different lasers. To address the poor stability and large steady-state error of traditional PID control systems caused by the nonlinear characteristics of NTC thermistors, a segmented adaptive PID control strategy was proposed. This achieved precise temperature regulation within ±0.005°C across the 20–40°C control range.

This paper presents a bulk-driven low-power transimpedance amplifier (TIA) for 5 Gb/s intra-computer optical communications, implemented in 65-nm CMOS technology. The design utilizes a bulk-driven technique with shorted gate and bulk terminals to enhance the gain, along with a two-stage inverter-based amplifier with series feedback and tail-current capacitance for bandwidth extension. Measurement results demonstrate a 3.76 GHz bandwidth with 0.81 mW power consumption, achieving an 82% power reduction compared to conventional low-power TIAs.

As a novel model-based and information-driven nonlinear method, Energy Shaping Control (ESC) has advantages, including excellent stability, fast dynamic response, and low computational complexity for grid-connected inverter control, but its control accuracy is sensitive to model parameter deviations. To this end, an Improved Energy Shaping Control (IESC) method based on online model parameter identification is proposed. Firstly, the ESC method is designed, followed by a stability analysis. Secondly, the influence mechanism of model parameter deviations is studied, and an adaptive online parameter identification strategy is developed. Finally, the experimental results confirm that the IESC not only preserves the inherent merits of the ESC but also exhibits superior steady-state performance and enhanced robustness against model parameter deviations.

This paper designs a Buck converter with high transient response speed based on the peak current mode architecture. An adaptive ramp compensation circuit is proposed, which determines the appropriate ramp compensation slope by detecting the switching frequency and duty cycle, reducing the impact of over-compensation on the system’s zero-pole position. Simulation results show that the circuit operates normally within the 4.5 V to 24 V power supply range, and the loop waveform is stable under a 75% duty cycle. Under typical conditions of 12 V to 5 V conversion, a 1 MHz switching frequency, and a 1 A load current, the over-shoot and under-shoot voltages of the transient response when the load current jumps by 1 A are reduced by 27% and 34% respectively compared to the optimized circuit, and the over-shoot recovery time and under-shoot recovery time are reduced by 48% and 27% respectively. For the recovery situation under overload conditions, the over-shoot voltage and recovery time are reduced by 50%.

This paper proposes a Hybrid Phase-Shift Optimized MPC (HPSO-MPC) strategy to enhance Dual Active Bridge (DAB) converter performance. Conventional SPS/DPS methods exhibit limited efficiency, soft-switching capability, and current stress optimization. HPSO-MPC employs model predictive control to formulate a multi-objective optimization model that minimizes current stress while improving output performance. Real-time parameter identification mitigates degradation from component mismatches, and Bayesian optimization dynamically tunes control weights. Simulation and experimental results on a 1-kW prototype validate superior performance: 92.6% peak efficiency (vs. 88.2% for SPS), 44.7% current stress reduction, and enhanced robustness across the full power range.

This paper proposes a frequency-variable subsystem for a 15 GHz high-performance broadband RF synthesizer. The subsystem integrates a 2–1025 frequency division ratio range divider (PRE_R_DIV), a 2–31 ratio frequency multiplier (MULT), an XOR-logic based frequency doubler (2X) circuit, and a 2–255 frequency division ratio divider (POST_R_DIV) with standard CMOS gate logic to generate appropriate PFD frequency (f_PFD) through frequency division and multiplication combinations. This ensures the f_VCO is not integer multiple of f_PFD, suppressing integer boundary spurious (IBS) obviously. The chip is manufactured by 40-nm CMOS technology and each sub-circuit can be enabled or disabled through designed bypass configuration. As input frequency is 200 MHz and the output is 15 GHz, with equivalent calculation, measurement results show subsystem achieved −150.54 dBc/Hz at 1 MHz phase noise performance while all sub-circuits enabled, −151.18 dBc/Hz at 1 MHz phase noise when they are bypassed. Results also show that the suppression of spur power at least 8 dB.