Using 1-µm InP HBT technology, a transimpedance amplifier (TIA) IC for optical links using 100-Gb/s dual polarization quadrature phase shift keying (100-G DP-QPSK) was designed and fabricated. Its wide dynamic range of 0.2∼2mAppd input current and good linearity of less than 3.3-% total harmonic distortion (THD) were confirmed. Also, externally controllable functions such as output amplitude adjustment, output shutdown, and auto/manual gain control switching were successfully implemented with InP HBT technology.

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The paper presents a new methodology to reduce scan test power by means of clock-gating. Scan-shift power is reduced through not clocking certain scan chains when they finish load/unload and scan-capture power reduction can be implemented by not clocking the scan chains in which there is no observation point. In addition, the corresponding hardware design is presented so as to show the feasibility of the new methodology. The algorithm for scan pattern reordering is also proposed to maximize the reduction of scan-shift power under certain constraint. Experimental results on several industrial designs have shown the effectiveness of this new methodology.

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This paper introduces a novel half-select resilient dual write wordline 8T (DW8T) SRAM with a sequential writing technique. The dual write wordlines are sequentially activated in a write cycle, and its combination with the half-VDD precharge suppresses the half-select problem. We implemented a 256-Kb DW8T SRAM and a half-VDD generator with a 40-nm CMOS process. The measurement results of the seven samples show that the proposed DW8T SRAM achieves a VDDmin of 600mV and improves the average VDDmin by 367mV compared to the conventional 8T SRAM. The measured leakage power can be reduced by 25%.

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This paper presents the design procedure, and implementation of a dual band planar quadrature hybrid with enhanced bandwidth. The topology of the circuit is a dual stage quadrature hybrid, which provides much larger flexibility to allocate the desired operating frequencies and necessary bandwidth than other previously published configurations. In this paper, small dual frequency transformers in two sections are used to modify conventional broad band hybrid coupler for having arbitrary dual band operation frequencies. This performance of the proposed coupler is verified by using commercial simulators and measurements. To this aim, by merging compilers and full-wave simulators, particle swarm optimization is used to achieve proper values to have desired goals. Finally, a dual stage quadrature hybrid for dual band (2.4 and 5.8GHz) wireless local area network systems has been fabricated, aimed to cover the bands corresponding to the standards IEEE802.11n. The measured results validate good dual band performance at 2.4/5.8GHz with enhanced bandwidths up to 12.5% and 25%, for the lower and upper bandwidth, respectively which satisfies the bandwidth requirement for the this standard.

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For numerical optimization of the cost function of the maximum likelihood (ML) algorithm for angle-of-arrival (AOA) estimation, Newton-type method has been widely employed. In this paper, we apply the Newton-type method to the optimization of cost function for spectrum estimation-based AOA estimation algorithm of the conventional beamforming, the Capon beamfomring and the MUSIC algorithm. Explicit expressions of the first derivatives and the second derivatives of the cost functions are presented. The expressions are used for the Newton iteration to improve the accuracy of the initial estimates. The performance improvement in terms of estimation accuracy and computational burden is demonstrated using the Monte-Carlo simulations.

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This paper presents a flexible and high-efficiency decoder for turbo product code using extended Hamming code. The supported component code ranges from (8,4) to (128,120) to provide enough flexibility for various communication standards. A novel Chase decoder architecture is developed with high efficiency using a low complexity algorithm. Moreover, a conflict free interleave memory access model for variable length is provided. A 90nm standard cell technology shows that the decoder sustains a maximum throughput of 5.6Gbps and consumes 300k gates.

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A 64Kb logic Resistive Random Access Memory (RRAM) test chip for encryption keys storage is presented for the first time. The excellent security features of resisting physical attacks and side-channel attacks are theoretically analyzed and experimentally proved. The chip is fabricated in 0.13µm standard logic process, and can directly integrate with encryption logic circuits of information systems.

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In this paper, an all-digital Power Amplifier (PA) that is tunable and fully-integrated on chip using 0.18µm CMOS is presented. The PA is designed using all-digital output-connected inverters controlled by a multi-phase clock generated using a multi-stage phase interpolator. Experimentally, in addition to the advantage of being all-digital and tunable, the PA consumed around 0.03mW/MHz, which is less than power consumed in recently proposed designs.

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This paper proposes a ramp dual-pulse actuation-voltage waveform that reduces actuation-voltage shift in capacitive microelectromechanical system (MEMS) switches. The proposed waveform as well as two reported waveforms (dual pulse, and novel dual-pulse) are analyzed using equivalent-circuit and equation models. Based on the analysis outcome, the paper provides a clear understanding of trapped charge density in the dielectric. The results show that the proposed actuation-voltage waveform successfully reduces trapped charge and increases lifetime due to lowering of actuation-voltage shift. Using the proposed actuation-voltage waveform, the membrane reaches a steady state on the electrode faster.

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Optical network-on-chip (ONoC) has been proposed to provide higher bandwidth and lower power consumption for future multicore systems. However, due to the intrinsic characteristic of optical devices, crosstalk noise is a potential issue for ONoC. The traditional routing algorithms for Benes ONoC have not considered the aspect of crosstalk. In this paper, we build the crosstalk model of the optical switch and analyze the crosstalk noise, signal-to-noise-ratio (SNR) and bit-error-rate (BER) for Benes ONoC. Moreover, we propose a routing algorithm to relieve the crosstalk problem. Simulation results verify the effectiveness of the algorithm compared to the conventional alternatives.

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We propose a triplexer in a low temperature co-fired ceramic substrate for ultra-wideband (UWB) and 2.4GHz wireless systems. This triplexer can be applied to the band of 2.4GHz wireless systems (2.4 - 2.5GHz), the band group 1 (3.168 - 4.752GHz) of multiband orthogonal frequency-division multiplexing UWB wireless systems, and the band groups 3 and 4 (6.336 - 9.504GHz) of the same systems. The triplexer achieves a compact size (5.3×5.3×0.384mm³). The insertion losses are less than 2.0dB and the isolation characteristics are higher than 24dB.

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