IEEJ Transactions on Electronics, Information and Systems
Online ISSN : 1348-8155
Print ISSN : 0385-4221
ISSN-L : 0385-4221
Volume 129 , Issue 8
Showing 1-28 articles out of 28 articles from the selected issue
Special Issue on “Small-scale Analog Integrated Circuits and Related Topics”
Preface
Special Issue Paper
<Electrical and Electronic Circuit, LSI>
  • Masakazu Aoki, Kenji Seto, Taizo Yamawaki, Satoshi Tanaka
    2009 Volume 129 Issue 8 Pages 1454-1458
    Published: August 01, 2009
    Released: August 01, 2009
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    Variation characteristics in MOS differential amplifier are evaluated by using the concise statistical model parameters for SPICE simulation. We find that the variation in the differential-mode gain, Adm, induced by the current factor variation, Δβ0, in the Id-variation of the differential MOS transistors is more than one order of magnitude larger than that induced by the threshold voltage variation, ΔVth, which has been regarded as a major factor for circuit variations in SoC's (2). The results obtained by the Monte Carlo simulations are verified by the theoretical analysis combined with the sensitivity analysis which clarifies the specific device parameter dependences of the variation in Adm.
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  • Hiroki Miyake, Mitsuo Okine, Shigetaka Takagi, Takahide Sato
    2009 Volume 129 Issue 8 Pages 1459-1464
    Published: August 01, 2009
    Released: August 01, 2009
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    In this paper, we propose a new current-mode highpass LC simulation filter. The circuit configuration is constructed with current mirror circuits and the lossy integrator and lossless integrator using grounded capacitors. Furthermore, the tuning of filter frequency can be achieved by adjusting the current values of DC supply current source.
    SPICE simulation results are shown to demonstrate the effectiveness of the proposed circuits.
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  • Koichi Ono, Masahiro Segami, Masao Hotta
    2009 Volume 129 Issue 8 Pages 1465-1470
    Published: August 01, 2009
    Released: August 01, 2009
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    We proposed a comparator circuit scheme using a current-subtraction-type offset-cancellation technique. Chopper amps are commonly used in CMOS comparators. However, the drawback of chopper amp is reduction of offset cancellation effect by the coupling capacitor in the signal path. To overcome this problem, a new offset-cancellation technique is developed. The effect of the offset-cancellation technique is verified by a prototype ADC fabricated in a 0.18um CMOS.
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  • Toru Kawana, Hirokazu Yoshizawa
    2009 Volume 129 Issue 8 Pages 1471-1475
    Published: August 01, 2009
    Released: August 01, 2009
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    A high-precision predictive switched-capacitor (SC) amplifier stage is described. It has a subsidiary signal path to desensitize op-amp imperfections such as low gain. In this paper, the effect of common-mode input voltage to the predictive SC amplifier is analyzed. Simulations using SPICE parameters of a 0.18 μm CMOS process indicate that small gain error and low harmonic distortion can be obtained even in the presence of common-mode input voltage of 200mV and that the circuit has immunity to the common-mode input voltage.
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  • Kouichi Fukuda, Takuya Ohno, Cosy Muto
    2009 Volume 129 Issue 8 Pages 1476-1482
    Published: August 01, 2009
    Released: August 01, 2009
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    In recent years, RF power amplifiers in MOS process are designed. In this paper, we discuss design considerations for MOS RF linear power amplifier. At first, we analyze class-A and AB amplifiers based on square-low characteristics and derive their distortion and drain efficiency, which include different results from literatures. We then consider a class-A 5GHz PA design with push-pull and Series-Combining Transformer configuration in 90nm process. Simulation results show that linear output up to 20.1[dBm] and P1dB of 21[dBm] are obtained.
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  • Haijun Lin, Tomoyuki Tanabe, Hao San, Haruo Kobayashi
    2009 Volume 129 Issue 8 Pages 1483-1489
    Published: August 01, 2009
    Released: August 01, 2009
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    This paper presents design methodology of a low-power high-frequency second-order Gm-C bandpass filter based on CMOS inverters with control-circuit-sharing architecture. We clarify trade-offs among its power consumption, Q factor, stability and noise performace. SPICE simulation with TSMC 0.18μm CMOS process shows that its power consumption is reduced by 67% compared with the Gm-C filter built straightforward with Nauta's OTA circuits, and that power consumption is reduced by 27% compared with the Gm-C filter built with Nauta's OTA circuits of optimized transistor sizes.
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  • Kawori Takakubo, Hajime Takakubo
    2009 Volume 129 Issue 8 Pages 1490-1498
    Published: August 01, 2009
    Released: August 01, 2009
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    A field effect transistor has the characteristic of high input resistance. Because a constant bias current is not necessary, it is widely utilized as a highly convenient element in existing integrated circuits. The exponential functional properties possessed by the bipolar transistor have the advantage of being able to realize large gain easily in comparison to the square power properties of the field effect transistor, but at present, the field effect transistor is used instead of the bipolar transistor. Amplifiers utilizing field effect transistors are inferior to those utilizing bipolar transistors from the standpoint of gain, output resistance, operational speed, etc.; consequently, in the next generation high speed communication technology, there is demand for an element that replaces the field effect transistor.
    This paper analyzes a subthreshold MOSFET employing Field Effect Bipolar Transistor (FEBT), which has high intrinsic gain and high input resistance, does not require a bias voltage at the signal input terminal, and can be used as a high-function field effect bipolar transistor capable of low power source voltage operations that solves the problems that have become topics in the large-scale integrated circuits of today.
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  • Kawori Takakubo, Hajime Takakubo
    2009 Volume 129 Issue 8 Pages 1499-1504
    Published: August 01, 2009
    Released: August 01, 2009
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    A proportional to absolute temperature voltage (PTAT Voltage) generator under ultra low power supply with MOSFETs operating in weak inversion region is proposed. The PTAT voltage generator is a necessary circuit for temperature sensor and bandgap reference circuit under low power supply in minimized CMOS analog integrated circuit. When two MOSFETs operating in weak inversion region are connected between rails, the PTAT voltage generator can be driven even under ultra low power supply voltage. As gate terminals are common in two MOSFETs connected in series and also bulk terminals are common, a gate to bulk voltage for MOS diode in a MOSFET is equal to that in another MOSFET. The proposed PTAT voltage generator operating under supply voltage from 0.2V to 1.8V with -70dB PSRR is fabricated with a standard 0.18μ m n-well CMOS technology and measured to investigate the basic principle. The measured characteristics of output voltage versus temperature fit to the theoretical ones deriving from design principle exactly.
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  • Kawori Takakubo, Ryo Shimoda, Hajime Takakubo
    2009 Volume 129 Issue 8 Pages 1505-1510
    Published: August 01, 2009
    Released: August 01, 2009
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    A parameter extraction circuit for MOSFET operating in weak inversion region is proposed. The extracted device parameter related with body effect for MOSFET is a coefficient of gate voltage degradation in a device model function deriving from the diffusion current of pn junction. With the parameter extraction circuit, the effect of gate voltage potential in MOS diode part can be controlled to be equal to that of reverse biased pn junction. So the degradation related with body effect can be compensated in spite of the different voltage between a source terminal and a bulk terminal. The proposed parameter extraction circuit can be applicated to two MOSFETs voltage subtractor and voltage follower operating under low power supply in order to compensate the body effect for MOSFETs. The characteristics of the extraction circuit fabricated with a standard 0.18μ m n-well CMOS technology are measured to investigate the basic principle. The thermal chracteristics are also measured. Measured characteristics of the proposed circuit fit to the theoretical chracteristics exactly.
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  • Nicodimus Retdian, Jieting Zhang, Takahide Sato, Shigetaka Takagi
    2009 Volume 129 Issue 8 Pages 1511-1517
    Published: August 01, 2009
    Released: August 01, 2009
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    In low power-supply voltage systems, the method converting the input voltage signals into current signals by a resistor is useful in case that the amplitude of input voltage signals is larger than the supply voltage. This paper proposes a variable gain current amplifier as a current mode processing interface. The proposed circuit uses MOSFETs operated in the triode region to obtain a controllable current gain. High linearity is achieved by fixing the drain-to-source voltage of the MOSFETs. The proposed circuit is simulated by HSpice to confirm its performance.
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  • Fujihiko Matsumoto, Toshio Miyazawa, Shintaro Nakamaura, Yasuaki Noguc ...
    2009 Volume 129 Issue 8 Pages 1518-1526
    Published: August 01, 2009
    Released: August 01, 2009
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    A transconductor is an important building block for analog signal processing circuits. A bias-offset transconductor is known as a linear MOS transconductor. Recently, transconductors are required to have linearity, low-voltage operation, and low power consumption. This paper presents a design of a transconductor based on a bias-offset transconductor for low-power operation with high linearity. The adaptively biasing technique is used to reduce wasteful operating current without reduction of the operating range. However, using adaptively biasing technique, the linearity of transconductance characteristic is deteriorated. Two MOSFETs operating as resistors are employed to improve the linearity. Moreover, high-precision floating voltage source circuit for low-voltage low-current operation is also presented. Simulation results show that the proposed techniques are effective to realize low-power and high-linearity transconductor.
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  • Hiroto Suzuki, Kazuyuki Wada, Yoshiaki Tadokoro
    2009 Volume 129 Issue 8 Pages 1527-1533
    Published: August 01, 2009
    Released: August 01, 2009
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    A substrate noise cancellation circuit using cancellation points is proposed. Noise characteristic of a conventional cancellation circuit with divided points is analytically explained. A new version of active cancellation circuit with some points removed is proposed. Noise reduction of this version of active cancellation circuits is confirmed by computer simulations. Simulation and experimental results show using two cancellation points effectively reduces the noise.
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  • Takahide Sato, Shigetaka Takagi, Nobuo Fujii
    2009 Volume 129 Issue 8 Pages 1534-1540
    Published: August 01, 2009
    Released: August 01, 2009
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    This paper proposes power-consumption and chip-area reduction technique for OTA-C based active inductors. In the proposed technique a conventional floating active inductor is divided into two identical active inductors whose chip-size and power consumption are half of the original one. The two divided active inductors are connected in parallel. In the parallel connection opposite ends of the two divided active inductors are connected. Thanks to this modification two pairs of OTAs can be merged and the total number of OTAs is minimized. The proposed technique ideally achieves 33 % reduction in power consumption and more than 33 % reduction in chip-area of the conventional active inductor. Moreover, the proposed active inductor has low mismatch characteristics because it is perfectly symmetrical. It is also shown that the proposed technique is vely effective in low power design of a pair of active inductors for fully balanced circuits.
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Special Issue Technical Note
<Electrical and Electronic Circuit, LSI>
  • Cosy MUTO, Shuichiro MARUTA, Kazumasa NOYORI, Masashi YANAIDA
    2009 Volume 129 Issue 8 Pages 1541-1548
    Published: August 01, 2009
    Released: August 01, 2009
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    In this paper, a trial to educate electronics for both elementary pupils and junior-high students is reported. A “making your own radio” workshop for elementary kids features a paper-craft resonator made of toilet paper cores and an empty box of tissue papers as well as solder-less main radio circuit. For elder elementary and junior-high pupils, a workshop making a bat detector (an ultra-sonic receiver) is provided to help their summer vacation research. Both workshops are planned to enlarge students wishing to knock the door of electronics. Also, we report questionnaires results for those workshops and follow up research results for bat detector workshop. Those results show that both children and parents long for good experiences on science/electronics materials and these experiences are important for future human resources in scientific fields including analog electronics.
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Special Issue Letter
<Electrical and Electronic Circuit, LSI>
  • Hiroyuki Kitagawa, Toshio Kobayashi, Yasuyuki Matsuya
    2009 Volume 129 Issue 8 Pages 1549-1550
    Published: August 01, 2009
    Released: August 01, 2009
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    When sigma-delta digital to analogue converter that has multi bit DAC is used, because of the mismatches of elements in output DAC, the non-linearity occur to output. And non-linearity lower S/N and the accuracy of conversion go bad. These mismatches occur at manufacturing process, so we cannot avoid the non-linearity as far as we use multi bit DAC. Then “The Dynamic Element Matching” technique is proposed as a means to ease this deterioration. In order to ease the deterioration of accuracy, I propose digital trimming method using a Double DWA as ⊿∑ D/A converter.
    This paper shows that we can improve S/N about 10dB with the proposed technique (Double DWA and digital trimming) compared with conventional DWA, on the simulation.
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  • Nobukazu Takai, Toshiaki Kumazawa
    2009 Volume 129 Issue 8 Pages 1551-1552
    Published: August 01, 2009
    Released: August 01, 2009
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    In this paper, low power-supply voltage rail-to-rail OTA which is independent of transconductance parameter is proposed. The proposed OTA is realized by utilizing characteristic of trode region MOSFET and voltage generating circuit which is inversely proportional to transconductance parameter K of MOSFET. HSPICE simulation is performed to verify the validity of the proposed circuit.
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  • Kawori Takakubo, Tarou Yoshizaki, Hajime Takakubo
    2009 Volume 129 Issue 8 Pages 1553-1554
    Published: August 01, 2009
    Released: August 01, 2009
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    A deviation of the mirrored current in paired MOSFETs operating in linear region is a serious problems. In this paper, an attenuator is added to diode connected MOSFET for operating in weak inversion region to suppress the mirrored current deviation. The operation of current mirror is derived from a MOSFET model based on diffusion current of pn junctions. The operation is confirmed by measured MOSFETs fabricated with a standard 0.18μ m n-well CMOS process. As the current of MOSFET operating in weak inversion is degraded for the current mirror circuit, a method to compensated the degraded current is also considered.
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Paper
<Optics, Quantum Electronics>
  • Kazuya Miyagi, Yoshinori Namihira
    2009 Volume 129 Issue 8 Pages 1555-1561
    Published: August 01, 2009
    Released: August 01, 2009
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    In this paper, we proposed nonlinear constant measurement method using sinusoidally modulated signal based on self-phase modulation (SM-SPM) technique. LiNbO3 modulator generated two side bands of fundamental wavelengths. It is very ideal that optical power of two fundamental wavelengths are line symmetry and its wavelengths spacing can be changed by controlling modulation frequency. It is confirmed that measurement repeatability of nonlinear constant (n2/Aeff) and nonlinear refractive index (n2) of SM-SPM method are a little superior to that of conventional CW-SPM method using two CW-LDs. Moreover, the averaged values of measurement results of SM-SPM method are in good agreement with that of the CW-SPM method.
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<Biomedical Engineering>
  • Yosuke Kurihara, Kajiro Watanabe, Mitsuru Yoneyama
    2009 Volume 129 Issue 8 Pages 1562-1568
    Published: August 01, 2009
    Released: August 01, 2009
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    It is quite important for Japan to maintain or promote the health condition of elderly citizens. Given the circumstances, the Ministry of Health, Labour and Welfare has established the standards for the activities and exercises for promoting the health, and quantitatively determined the exercise intensity on 107 items of activities. This exercise intensity, however, requires recording the type and the duration of the activity to be calculated. In this paper, the exercise intensities are surmised using 3D accelerometer while the subjects are walking and running. As the result, the exercise intensities were surmised to be within the root mean square error of 1.2[METs] for walking and 3.2[METs] for running respectively.
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<Intelligence, Robotics>
  • Yasuchika Mori, Akihiro Takaki, Masayoshi Doi
    2009 Volume 129 Issue 8 Pages 1569-1575
    Published: August 01, 2009
    Released: August 01, 2009
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    There are a lot of multi-inputs multi-outputs (MIMO) systems in the chemical plants of the manufacturing, and they have the multiple time delays which are different length in each their inputs and outputs pair. This paper explains two-degreeds-of-freedom (2DOF) control system based on generalized minimum variance control (GMVC) for MIMO systems. It can improve the tracking performance to the reference signals and the response property for the disturbance. And the states between the sampling period can be expressed by using the modified z transform for considering multiple time delays.
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  • Takeshi Saitoh, Naoya Tada, Ryosuke Konishi
    2009 Volume 129 Issue 8 Pages 1576-1584
    Published: August 01, 2009
    Released: August 01, 2009
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    This paper develops the indoor mobile robot navigation by center following based on monocular vision. In our method, based on the frontal image, two boundary lines between the wall and baseboard are detected. Then, the appearance based obstacle detection is applied. When the obstacle exists, the avoidance or stop movement is worked according to the size and position of the obstacle, and when the obstacle does not exist, the robot moves at the center of the corridor. We developed the wheelchair based mobile robot. We estimated the accuracy of the boundary line detection, and obtained fast processing speed and high detection accuracy. We demonstrate the effectiveness of our mobile robot by the stopping experiments with various obstacles and moving experiments.
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<Media Information, User Interface>
<Softcomputing, Learning>
  • Caixia Yuan, Fuji Ren, Xiaojie Wang, Yixin Zhong
    2009 Volume 129 Issue 8 Pages 1593-1600
    Published: August 01, 2009
    Released: August 01, 2009
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    This paper presents a work of function labeling for unparsed Chinese text. Unlike other attempts that utilize the full parse trees, we propose an effective way to recognize function labels directly based on lexical information, which is easily scalable for languages that lack sufficient parsing resources. Furthermore, we investigate a general method to iteratively simplify a sentence, thus transferring complicated sentence into structurally simple pieces. By means of a sequence learning model with hidden Markov support vector machine, we achieve the best F-measure of 87.40 on the text from Penn Chinese Treebank resources - a statistically significant improvement over the existing Chinese function labeling systems.
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  • Yuya Yamagishi, Tadashi Tsubone, Yasuhiro Wada
    2009 Volume 129 Issue 8 Pages 1601-1608
    Published: August 01, 2009
    Released: August 01, 2009
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    Recently, Brain computer interface (BCI) which is a direct connecting pathway an external device such as a computer or a robot and a human brain have gotten a lot of attention. Since BCI can control the machines as robots by using the brain activity without using the voluntary muscle, the BCI may become a useful communication tool for handicapped persons, for instance, amyotrophic lateral sclerosis patients. However, in order to realize the BCI system which can perform precise tasks on various environments, it is necessary to design the control rules to adapt to the dynamic environments. Reinforcement learning is one approach of the design of the control rule. If this reinforcement leaning can be performed by the brain activity, it leads to the attainment of BCI that has general versatility. In this research, we paid attention to P300 of event-related potential as an alternative signal of the reward of reinforcement learning. We discriminated between the success and the failure trials from P300 of the EEG of the single trial by using the proposed discrimination algorithm based on Support vector machine. The possibility of reinforcement learning was examined from the viewpoint of the number of discriminated trials. It was shown that there was a possibility to be able to learn in most subjects.
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Letter
<Information and Communication Technology>
<Speech and Image Processing, Recognition>
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