Interdisciplinary Information Sciences
Online ISSN : 1347-6157
Print ISSN : 1340-9050
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Volume 21 , Issue 4
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Special Issue
Reviews and Lectures: Exploring the Limits of Computation II
  • Suguru TAMAKI
    Volume 21 (2015) Issue 4 Pages 289-306
    Released: December 17, 2015
    [Advance publication] Released: October 01, 2015
    JOURNALS FREE ACCESS
    A two-prover one-round game is a fundamental combinatorial optimization problem arising from such areas as interactive proof systems, hardness of approximation, cryptography and quantum mechanics. The parallel repetition theorem states that for any two-prover one-round game with value smaller than 1, k-fold parallel repetition reduces the value of the game exponentially in k. The theorem was originally proved by Raz (SICOMP 1998) and later simplified and improved by Holenstein (Theory of Computing 2009) and Rao (SICOMP 2011). All the known proofs are based on information theoretic arguments. Very recently, Dinur and Steurer (STOC 2014) obtained a new proof of the parallel repetition theorem based on a matrix analysis argument. In this paper, we describe a special case of Dinur and Steurer's proof. We also describe an application of the parallel repetition theorem to inapproximability results of two-prover one-round games. Our presentation is almost self-contained in the sense that we only assume the PCP theorem. To do so, we also present proofs for the necessary results related to algebraic graph theory and hardness of approximation.
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  • Kazuhisa SETO
    Volume 21 (2015) Issue 4 Pages 307-328
    Released: December 17, 2015
    [Advance publication] Released: October 20, 2015
    JOURNALS FREE ACCESS
    Proof complexity, a measure to estimate the sizes of proofs in propositional logics, is studied as one of the fundamental approaches to the \mathcal{P} versus \mathcal{NP} problem, and has some practical applications such as automated theorem proving. It is a very hard task to prove lower bounds on strong proof systems such as Frege systems, for which no non-trivial lower bound is known yet. On the other hand, we have some rich success stories on weaker proof systems such as resolution proof systems. In this paper, we focus on resolution proof systems and review some of the existing techniques for proving lower bounds.
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  • Kenya UENO
    Volume 21 (2015) Issue 4 Pages 329-349
    Released: December 17, 2015
    [Advance publication] Released: October 20, 2015
    JOURNALS FREE ACCESS
    In this paper, we review subadditive approaches which arise in the theory of mathematical programming and computational complexity. In particular, we explain the duality theorem of integer programming and techniques to prove formula-size lower bounds as fundamental subjects in mathematical programming and computational complexity, respectively. We discuss parallel visions of these two different areas by showing some connections between them.
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  • Taisuke IZUMI
    Volume 21 (2015) Issue 4 Pages 351-370
    Released: December 17, 2015
    [Advance publication] Released: October 20, 2015
    JOURNALS FREE ACCESS
    Distributed graph algorithms are the methods for solving graph problems defined over networks of computers, where each vertex is a computing entity (i.e., process) and an edge is a communication link between two processes. This introductory survey presents a brief outline, several important concepts, and the fundamental complexity study of distributed graph algorithms. For a number of standard problems such as the shortest path and the coloring, we spotlight their inherent difficulties and challenges.
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  • Katsuhisa YAMANAKA
    Volume 21 (2015) Issue 4 Pages 371-399
    Released: December 17, 2015
    [Advance publication] Released: October 20, 2015
    JOURNALS FREE ACCESS
    A floorplan is a partition (dissection) of a rectangle into smaller rectangles by horizontal and vertical line segments such that no four rectangles meet at the same point. Floorplans are used to design the layout of very-large-scale integration (VLSI) circuits. Since modern VLSI circuits are extremely large, it is necessary to design compact floorplans (VLSI layouts). In 2004, Feng et al. surveyed ways of representing floorplans. However, over the past decade, various new methods have been developed, and in this paper, we survey these recent developments in floorplan representations.
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