This paper describes the theoretical operation and measured characteristics of a charge detection amplifier, which detects charge that moves in the bulk of a silicon CCD channel. The charge detection is nondestructive and, therefore, free of kTC noise. The detector is very high speed and low-noise operation make it suitable for high-resolution CCD image sensors. A simple gradual channel transistor approximation was used to derive a first-order device model, which was then used to predict the charge-conversion sensitivity, linearity, and noise. The derived theoretical results were compared with detailed measurements, which included the measured conversion gain, linearity, reset feed through, noise, and hot-carrier effects. The analysis and measurements demonstrated that this bulk charge detection (BCD) is superior to today's state-of-the-art floating-diffusion charge-detection amplifiers in high-speed applications.
We have developed a CMOS active pixel sensor to be used as a key device for capturing image information. A hole accumulated diode (HAD), which is widely used for CCD image sensors, incorporated into the sensor reduces the dark current more than does a PN photodiode. The HAD was redesigned to be suitable for CMOS processes, in particular to prevent image lags at low voltage operation and to improve the sensitivity of wavelengths from green to red. The combination of a five-transistor pixel circuit and a correlated double-sampling circuit at the output stage dramatically reduces the fixed-pattern noise. A 1/3-type 330 k-pixel VGA-format CMOS image sensor had low noise and high sensitivity characteristics.
A CMOS image sensor with a very-low-leakage photodiode and a low-voltage buried photodiode has been developed that has sensitivity comparable to that of conventional CCD imagers. Photodiode leakage current caused by stress originates in the surface damage and in the dislocations and defects near the local oxidation of silicon. Use of a dislocation free stress-release process and of a buried photodiode reduced the damage and eliminates the stress. A 1/4-inch 330 K pixel CMOS image sensor using this buried photodiode structure and a sensor-specified process had a low dark current of 0.1 nA/cm2 in 5.6 μm pixels. The buried photodiode can operate in complete charge-transfer mode at voltage as low as 3.3 V, thereby suppressing the image lag and FPN of the photodiode.
A CMOS image sensor has been developed. The sensor captures non-destructive intermediate pictures and fully accumulated video-rate pictures. It is useful for applications that require both high-speed pictures and fully accumulated video-rate pictures, such as motion-vector estimation for moving-picture encoding and motion tracking cameras. The sensor uses bi-directional multiple charge transfer active pixels and is fabricated using 0.35 μm CMOS technology. It captures 480 frame/s high-speed intermediate pictures and 30 frame/s fully accumulated video-rate pictures with FPN reduction in both type of pictures.
We describe a new adaiptive-integration-time image sensor based on a column parallel architecture which has 128×64 pixels. In this prototype. the scheme to control integration time is greatly extended, and the pixel pitch, processing speed, and power consumption are improved compared with our previous version. Both the in time and output timing are decided the combination of three elements : motion detection, saturation detection. and external signal control. We have fabricated the prototype using the CMOS 0.8 μm process and show the results or some experiments.
An image sensor is described that has programmable multiresolution readout capability. Unlike the previously reported spatially variant sampling sensor which sub-samples without filtering, this sensor averages blocks of the pixels and reads them out. It thus does not suffer aliasing effects. The 64×64 pixel array is programmed to read out the averaged pixel values around the center pixels. These values can be computed for differing block sizes (3×3, 5×5, or 7×7) around the center pixel. The block size can be selected for each pixel, and the blocks can overlap. The use of this sensor will, for example, eliminate the need for software-intensive image pyramid reconstruction.
A smart image sensor with quad-tree scan implemented by a novel method is described. Quad-tree scan reduces the number of cycles needed to scan an entire image in comparison with a raster scan. The quad-tree scan is implemented by placing the scan controller outside the pixel array and accessing a variable-size block of the pixel array. We designed the image sensor using a 0.6-μm CMOS 3-metal 2-poly-Si process. A 32×32 pixel array and the scan controller are integrated on a 4.5×4.5 mm2 die. Each pixel has an A/D conversiton circuit and a motion detection circuit in a 95×95 μm2 area. Measurements showed that the scan controller works at 10 MHz with 10 mW power dissipation. Image acquisition and motion detection using quad-tree scan were successfully tested.
A 3-D head-mounted-display (HMD) system is useful for constructing a virtual space. We have developed a 3-D HMD system with a monocular stereoscopic display. This paper describes a stereoscopic image capturing camera that uses the camera position shifting optics to capture monocular stereoscopic images. It also describes the characteristics of spatial reconstruction when the parallax interval and viewing angle have been changed.
A micro channel plate (MCP) fabricated using micro technologies has been developed. Photosensitive glass is used for the microchannel substrate, and lead-glass is used for the secondary electron multiplication films. A new developed etching device (jet etching system) for photosensitive glass can form microchannels with an aspect ratio of 20 in combination with a suitable UV exposure energy and crystallization temperature. The lead-glass films are prepared using the sol-gel method and deposited on the internal surfaces of the microchannels. Films with added MgO of 5% had a higher coefficient of secondary electron emissions. The fabricated single-type MCP has a gain of 79 at an applied voltage of 1500 V.
An optically readable bi-material infrared detector has been developed. In this paper, the basic operating principle of this detector, the structure of the test device, and the optical read-out system are described. The thermal-bending property of the test device is also reported. We measured the infrared responsivity of this detector. A noise equivalent temperature difference (NETD) of 0.25 K was obtained with the test device, which had an element size of 75μm×75 μm.
One- and two-dimensional slot antenna-coupled microbolometer arrays were fabricated, and the receiving properties for 2.5-THz CH3OH-laser radiation were measured. The pattern of the fabricated arrays coincided with those of a single-slot antenna-coupled microbolometer, independent of the array number. The detected voltage increased linearly with the number of slots, and the optimum distance between slots was found to be 0.5 λd (λd is the dielectric wavelength.) in the E-plane and 1.6 λd in the H-plane.
High resolution solid-state image sensors are strongly required for many imaging systems. Double resolution enhancement without increasing CCD pixel density was achieved by CCD-chip swing operation. Furthermore, a wobbling operation enlarging a pixel aperture is capable to suppress effectively a field flicker. We analytically derive that a triangular wave swing and wobbling operation is superior to a rectangular wave mode for higher resolution imaging in considering aliasing. Also, an optimum condition for the triangular wave swing and wobbling operation is derived.