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Article type: Cover
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Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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Article type: Index
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Toc1-
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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Nobukazu Teranishi
Article type: Article
Session ID: IST2014-52
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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The pinned photodiode (PPD) is the primary technology for image sensors and used in almost all CCD image sensors and CMOS image sensors. This paper discusses effect and limitation of PPD, especially dark current and electronic shuttering. Even when PPD is used and silicon surface is neutralized, proposed model explains that GR centers at the silicon surface contribute the dark current. The temperature dependence is an activation type with activation energy, E_g, not E_g/2. It is important to reduce GR centers for dark current reduction at PPD also. It is also noted that the vertical overflow drain (VOD) shutter combined with PPD has potential of high speed shuttering with small skew.
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Seiji Nishiwaki, Tatsuya Nakamura, Masa-aki Suzuki
Article type: Article
Session ID: IST2014-53
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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We developed unique micro color splitters, which can disperse light incident upon image sensors by exploiting property of light as a light-wave behavior, and has succeeded in achieving highly-sensitive color photograph by applying them to actual image sensors. Color alignment avoiding the use of color filters is permitted using the micro color splitters which control diffraction phenomena of light in microscopic area, approximately 2-fold higher sensitivity in color photograph in comparison with a conventional method using color filters has been achieved.
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Rihito Kuroda, Shigetoshi Sugawa
Article type: Article
Session ID: IST2014-54
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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An image sensor technology based on flattened Si surface is summarized that enables a wide spectral response of 200-1000 nm and high robustness of light sensitivity toward ultraviolet light exposure. Performances and opportunities of the light detectors and image sensors using the developed technology are demonstrated.
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Nanjian WU
Article type: Article
Session ID: IST2014-55
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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This paper introduces a high speed vision chips based on multiple levels of parallel processors. It integrates an image sensor, three von Neumann-type parallel processors and a SOM neural network. The SOM network can be reconfigured from the pixel-parallel array processor and reduces the high-level image feature recognition processing time by 98%. The chip can achieve 1000fps system-level performance from image acquisition to high-level feature recognition processing.
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Youngcheol Chae
Article type: Article
Session ID: IST2014-56
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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In this paper, the operation of column-parallel oversampled ADCs for CMOS imager is reviewed and several implementations are described. Both architectural and circuit level innovations are explained for practical column-parallel implementations and prototype implementations are described. Because of their multiple sampling nature, such column-parallel oversampled ADCs have also been investigated for high performance imagers, e.g. low-light level imaging and compressed sensing. Finally, several extensions of column-parallel oversampled ADCs are briefly discussed.
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Masayuki Ikebe, Daisuke Uchida, Makito Someya, Kaori Watanabe, Koudai ...
Article type: Article
Session ID: IST2014-57
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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We propose a single-slop ADC with a time to digital converter (TDC) that uses a multi-phase clock. When the TDC with resolution of n bits is adapted to the ADC, the conversion time is reduced by a factor of 2^n. Applying the TDC that uses multi-phase-clock signal reduced the number of circuit elements, achieved consistency between the single-slope ADC and the TDC, and realized robust meta-stability.
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Hiroki Ishikuro
Article type: Article
Session ID: IST2014-59
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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This paper presents ultra-low voltage (lower than 0.5V) and low power (sub-microwatt operation) data converter techniques. For applications such as sensor nodes and medical implantable devices, power scalability at wide frequency range is very important. Systematic approaches to reduce the power consumption at middle frequency range, to improve the maximum operating frequency, and to reduce the leakage power at low frequency ranges are introduced.
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Chih-Cheng Hsieh, Chin Yin, Albert Yen-Chih Chiou, Chih-Lin Lee
Article type: Article
Session ID: IST2014-60
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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The demand of low-power imaging solution is urgent for emerging internet-of-things (IoT) applications. In this paper, the design challenges of low-voltage and low-power CMOS imager are investigated. Several design solutions of low-voltage operation including high dynamic range and smart function are also introduced.
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Takehiro Ebata, Koshiro Moriguchi, Daisuke Miyazaki, Takaaki Mukai
Article type: Article
Session ID: IST2014-61
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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Combining rolling shutter of a CMOS image sensor with compound lenses, we can get high frame rate for moving object. Moreover, by super-resolution processing with multiple images, we can retrieve the resolution for static objects, which is decreased because of the compound lens structure. Region segmentation by detecting movement is performed to separate regions that contain moving objects from stable objects. High frame rate processing and super-resolution processing are applied the dynamic regions and static region, respectively to give frame rate and resolution for each region adaptively.
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Hiroyuki Suzuki, Lihao Shu, Takuya Urabe, Takashi Obi, Nagaaki Ohyama
Article type: Article
Session ID: IST2014-62
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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We have proposed a finger vein encrypted sensing system based on compressed sensing, in which we can acquire optically-encrypted vein images and it is possible to verify them as they are encrypted. However, its verification accuracy is not so high, whereas it can provide sufficient security enough to preserve biometric data from leaking out. To address this issue, we improve the verification method, that is, we extract the important region in the spatial frequency domain of the finger vein image. We also demonstrated the efficiency of the proposed method by numerical experiments.
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Hiroki Mima, Keiichiro Kagawa, Atsushi Iwata, Chizuko Ogata, Makoto Um ...
Article type: Article
Session ID: IST2014-63
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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A compound-eye imaging module for intraoral biological measurement is presented. A compound-eye imaging module TOMBO enables to capture several kinds of information on the subject at a time. We have measured shape of gingiva, position of muco-gingival junction, and compositional amounts of the gingiva with respect to melanin, oxyhemoglobin, and deoxyhemoglobin.
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Kazuhiro Shimonomura, Kotaro Kitagawa, Vu Truong Son Dao, Takeharu G. ...
Article type: Article
Session ID: IST2014-64
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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Ultra-high speed image sensors have been developed and applied to various field of science and engineering. Toward the temporal resolution of 1ns, we have proposed a new structure of an image sensor, a backside-illuminated multi-collection-gate image sensor (BSI MCG image sensor). In order to evaluate the performance, it is necessary to simulate the paths of photoelectrons from the generation site to a collecting gate, which is affected by several factors, including randomness in motion of the electrons. In order to address this factor, a Monte Carlo method can be an effective tool. In this paper, the temporal resolution of the sensor is studied for different thickness of the chip by using the Monte Carlo simulator.
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Chihiro IZAKI, Junichi AKITA
Article type: Article
Session ID: IST2014-65
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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The pixels in the conventional image systems are placed at lattice positions, that cause the jaggy edge perceived in the slant lines and curve lines. We have proposed the pseudorandom pixel placement for reducing the jaggy effect, which is implemented the random arrangement of four types of pixels with variety of active area positions. In this paper, we describe the appearance of jaggies by spatial frequency of jaggies and describe pixel structure by showing the relation between the spatial frequency and aperture ratio.
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Hiroto NAKASHIMA, Keiichiro KAGAWA, Kazuhiro SHIMONOMURA
Article type: Article
Session ID: IST2014-66
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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We propose a combined tactile and proximity sensor for handling robot. Tactile sensing is based on the method known as a light conductive plate. Proximity information is obtained through depth measurement from stereo images. These tactile and proximity information are both captured by using the compound-eye camera. We describe a grasping strategy for a robot hand employing a combined tactile and proximity sensor.
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Yuta SASADA, Junichi AKITA
Article type: Article
Session ID: IST2014-67
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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Eye direction measurement is expected to have wide application area, including user interface and psychological analysis. The saccade, a rapid eye motion, is also expected to be applicable for a new type of interaction technique, however, it is impossible to measure and track the saccade in real-time by using the conventional eye direction measurement system. In this paper, we describe the high frame, 500[Hz], and low processing latency eye tracking camera system using high speed camera and FPGA, are described. We also discuss on the saccade destination prediction algorithm enabling to predict the saccade destination at early step of saccade, before the saccade ends.
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Myunghan Bae, Jeongyeob Kim, Byung-Soo Choi, Sannggwon Lee, Eunsu Shin ...
Article type: Article
Session ID: IST2014-69
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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This paper presents the performance characteristics of a new active pixel sensor (APS) structure based on a linear-logarithmic response, which is implemented using a 0.35-μm standard CMOS process. The new pixel structure allows tuning of the dynamic range and the sensitivity. At the low-intensity light, both the dynamic range and the linear sensitivity were improved due to the increased capacitance of the photodetector. At the high-intensity light, the pixel is operated in a logarithmic mode by an additional MOSFET. Furthermore, the reference voltages can adjust the sensitivity and the starting point of logarithmic response.
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Byung-Soo Choi, Myunghan Bae, Jeongyeob Kim, Sannggwon Lee, Eunsu Shin ...
Article type: Article
Session ID: IST2014-70
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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In this paper, we proposed a novel image sensor using a feedback reset mechanism. To extend the dynamic range, an additional feedback circuit which is composed of a comparator and a voltage converter is needed. The floating diffusion node in the APS is reset to the medium voltage at high illumination. The proposed image sensor is based on the 3-transistor active pixel sensor (APS). It is possible to switch back and forth between normal mode and feedback reset mode, and to control both feedback reset time and voltage values. The proposed image sensor was designed and fabricated with a 0.35 μm 2-poly 4-metal CMOS process.
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Jeongyeob Kim, Myunghan Bae, Byoung-Soo Choi, Heedong Kim, Eunsu Shin, ...
Article type: Article
Session ID: IST2014-71
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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We have designed the block-based complementary metal oxide semiconductor (CMOS) image sensor. This image system has a unit block of the 4-by-4 pixels using the conventional 3-transistor active pixel sensor (APS). In addition, this system used additional computation circuit. The proposed imaging system can control the switch between the bias circuit and the transistor of pixel bias. The block-based CMOS imaging system has been fabricated using 0.35 μm standard CMOS process. It was confirmed that the proposed block-based system can reduce the power consumption of the unit pixel arrays compared to the conventional active pixel arrays.
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Taichi KASUGAI, Sang-Man HAN, Hanh TRANG, Taishi TAKASAWA, Satoshi AOY ...
Article type: Article
Session ID: IST2014-72
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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This paper presents a CMOS ToF range imager with 4-tap charge modulator using pinned-photodiode high-speed lock-in pixels. The proposed lock-in pixel structure using lateral electric field (LEF) control is suitable for implementing a multiple-tap charge modulator while achieving high-speed charge transfer for high time resolution. In this presentation, we report the design, implementation and evaluation results of the ToF range imager using the 4-tap LEF modulator.
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Hiroyuki HAKOISHI, Toshinori Otaka, Takayuki HAMAMOTO
Article type: Article
Session ID: IST2014-73
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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We propose a multiple-focal plane CMOS image sensor to obtain multi-view images using a single device. The image sensor has 12 small focal planes and can simultaneously capture multi-view images by controlling them individually. Using this image sensor, we can obtain the multi-view images by a system that is smaller than conventional camera array systems. In this paper, we describe the architecture of the proposed multiple-focal plane CMOS image sensor and the specifications of a prototype chip.
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Takashi Kobayashi, Takayuki Hamamoto
Article type: Article
Session ID: IST2014-74
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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In this study, we propose an imaging method, which can simultaneously acquire images with different characteristics by controlling the reset and readout timings in a block unit. The image sensor can control the reset and readout timings dynamically in a block unit via a threshold operation during the exposure period.
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Koshiro Moriguchi, Daisuke Miyazaki, Keiichiro Kagawa, Futa Mochiduki
Article type: Article
Session ID: IST2014-75
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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A three-dimensional measurement scheme based on time-of-flight method using multi-aperture image capturing system, which can give temporally coded exposure for each aperture individually by programming shutter pattern for each block of pixel array is proposed. The measurement frequency is enhanced on the basis of compressive sensing technology by capturing multiple temporally coded images simultaneously. The results of preliminary experiments are presented to confirm measurement of the phase of a light signal modulated at a higher frequency than the frame rate of the image sensor.
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De Xing Lioe, Kamel Mars, Sang Man Han, Taishi Takasawa, Keita Yasutom ...
Article type: Article
Session ID: IST2014-76
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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We demonstrate a low-noise stimulated Raman scattering (SRS) CMOS imager using high-speed lock-in pixels. To detect small SRS signal under an extremely large offset due to probing laser signal of which the ratio is 10^<-5>, a lock-in pixel using a high-speed demodulator, low-pass filter, and multiple-sampling amplifier is designed. The residual offset and low-frequency noise are reduced by two steps; one is sampling phase adjusting in the multiple-sampling amplifier and the other is a double modulation technique. The double modulation effectively reduces the offset and low-frequency noise, or 1/f noise. A SRS CMOS imager chip for the proof of concept is implemented and a successful operation is demonstrated. The detectable AC signal level under the large DC offset is measured to be smaller than ratio of 10^<-4>. This finding suggests that the detection of a very small SRS signal from a biological sample is feasible using this technique.
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Zhiheng Wei, Tongxi Wang, Shoji Kawahito
Article type: Article
Session ID: IST2014-77
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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This paper presents a 12-bit folding-integration/cyclic (FI/Cyclic) ADC using depletion-mode MOS (DMOS) capacitors for CMOS image sensors (CISs). It has been verified by circuit simulation that the differential non-linearity (DNL) of the FI/Cyclic ADC caused by the voltage dependency of DMOS capacitor is very small.
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Keiichiro Nakazaki, Yuri Murakami, Masahiro Yamaguchi
Article type: Article
Session ID: IST2014-78
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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We introduce hybrid-resolution spectral imaging system for compact spectral video acquisition system. In this system, low-resolution spectral image and high-resolution RGB image are simultaneously captured and then high-resolution spectral image is generated. The system can capture spectral video in 3fps and displays reproduced color image under arbitrary illuminant.
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Hirotaka SUZUKI, Keiichiro KAGAWA, Bo Zhang, Min-Woong SEO, Taishi TAK ...
Article type: Article
Session ID: IST2014-79
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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Low power operation is essential in the applications of CMOS image sensors to Internet of Things (IoT). Focusing on the potential of low power operation, we are developing a pulse-width-modulation pixel based on the 4T-APS to realize low-noise and high sensitivity imaging as well. In this report, feasibility of the 4T-PWM performing pixel-level single-slope ADC is examined, and pixel operation is verified with test circuits.
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Sun-Il Hwang, Hyeon-June Kim, Ji-Wook Kwon, Dong-Hwan Jin, Jong-Ho Par ...
Article type: Article
Session ID: IST2014-80
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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This paper presents resolution-reconfigurable Successive-Approximation Analog-to-Digital Converter (SA ADC) for CMOS Image Sensor (CIS). Bridge capacitor enables Capacitive DAC(CDAC) to be narrow. ADC resolution can be selected 12-bit or 8-bit by controlling the MSB switch. In 8-bit mode, since 4-bit MSB capacitors of large sizes are not in use, power consumption is reduced. The power consumption and linearity performances from post-layout simulations of this SA ADC is shown.
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Hiroki KAMEHAMA, Sumeet SHRESTHA, Keita YASUTOMI, Keiichiro KAGAWA, Ay ...
Article type: Article
Session ID: IST2014-81
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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In the SOI pixel technology, an important mission of the research project is to develop a technique for extremely low noise and wide dynamic range photon energy measurements in the small area. We propose charge collection and surface potential pinning structure for a SOI detector for low noise and wide dynamic range. This technique greatly increases charge-to-voltage conversion gain while stabilizing the operation of SOI circuits. A double doping technique for increasing potential barrier to holes at the surface region is effective for a stable operation to the variation of back bias voltage.
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Seong-Jin Kim
Article type: Article
Session ID: IST2014-82
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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This paper presents an image sensor with PPD-based lock-in pixels to provide high-quality 2-D color image and high-accuracy 3-D depth map in a time-multiplexed manner. The prototype chip demonstrates the demodulation of 20 MHz time-of -flight signal with the contrast of 52.8%.
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Keita YASUTOMI, Keiichiro KAGAWA, Shoji KAWAHITO
Article type: Article
Session ID: IST2014-83
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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This paper presents a TOF imager with high range resolution of 0.3mm, which corresponds to 2 ps time resolution. To achieve this high resolution, the imager uses a high-speed lock-in pixel based on a lateral electric filed modulation and a novel ToF measurement technique by using an impulse photocurrent response. To realize a range imager with 2D pixel array, column-wise gating-clock skew calibration is implemented.
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Izumi Nishidate
Article type: Article
Session ID: IST2014-84
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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We investigated a method to quantify the concentrations of chromophores in biological tissue from digital RGB images that is specifically developed for functional imaging of biological tissue. In vivo experiments with the human skin tissue during normal and occluded conditions demonstrated the ability of the method to evaluate physiological functions of tissues.
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Yasuyuki OZEKI
Article type: Article
Session ID: IST2014-85
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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This paper introduces stimulated Raman scattering (SRS) microscopy for stain-free biomedical imaging. We show that our high-speed spectral microscopy is capable of multicolor imaging of various types of tissues.
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Hisanori Suzuki, Masaharu Muramatsu, Yasuhito Miyazaki, Shin'ichi ...
Article type: Article
Session ID: IST2014-86
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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We introduce our CCD image sensors for astronomical applications. We developed the fully-depleted thick back-illuminated CCD fabricated on the ultra-high resistivity n-type silicon wafer in collaboration with National Astronomical Observatory of Japan (NAOJ) for a new generation instrument for Subaru Telescope on Mt. Mauna Kea in Hawaii: a very wide-field CCD camera which named Hyper Suprime-Cam (HSC). The CCD format is 4-side buttable, 2k×4k 15μm square pixels with 4 low noise output amplifiers.
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Yasuo Arai
Article type: Article
Session ID: IST2014-87
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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Radiation imaging sensors using Silicon-On-Insulator (SOI) technology have been developed. By using the SOI wafer, thick sensing region and CMOS readout circuit are implemented in a single die. Special process to realize such detector is developed in collaboration with a semiconductor company. The detector can be sensitive to many kinds of radiations, so various kinds of detectors are being developed through Multi Project Wafer (MPW) runs operated by us. The SOI pixel detectors can achieve not only high-resolution and good-sensitivity imaging sensor, but also unique detectors necessary for scientific applications which include functions of trigger, ADC, TDC etc. in a pixel. Recent results and present status are described.
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Takashi TOKUDA, Hiroaki TAKEHARA, Toshihiko NODA, Kiyotaka SASAGAWA, J ...
Article type: Article
Session ID: IST2014-89
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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Our studies on developing implantable devices based on CMOS image sensor technology are presented and discussed. The design of CMOS chips, packaging, experimental evaluations are described. The issues and difficulties, and future perspective are also discussed.
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Atsushi ONO, Hiroaki SATOH, Hiroshi INOKAWA
Article type: Article
Session ID: IST2014-90
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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We demonstrated the quantum efficiency (QE) of silicon-on-insulator (SOI) photodiode was enhanced in visible wavelength region by using gold (Au) nanoparticles. The photons plasmonically scattered by Au nanoparticles couples with the waveguide mode in SOI, and are absorbed efficiently. Optimum size and density of Au nanoparticles have been investigated by 3-D FDTD simulations for sensitivity improvement. The highest enhancement factor of the absorption efficiency in 100-nm-thick SOI is obtained by periodically attaching Au nanoparticles of about 140 nm in diameter and 1.7×109 particles/cm2 in density.
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Hajime NAGAHARA
Article type: Article
Session ID: IST2014-91
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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A digital camera industry have been developed in a decade and has a lot of applications equipped with PC and mobile phone etc. However, optics and basic principle of image projection does not changed in latest digital camera. Computational imaging is a new research area for developing new imaging strategy for combining optics and processing of the digital imaging. Camera optics, such as lens, aperture, make an image on a sensor. The quality of the image is decided by the optical transfer function called point spread function (PSF). Computation imaging engineers the PSF for imaging and produces improved quality or function of the image after processing. I will introduce some examples of the PSF engineering methods; coded aperture, focus sweep and wavefront coding in computation imaging, and discuss about future of computational imaging combined with sensor technology in this talk.
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Article type: Appendix
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App1-
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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Article type: Appendix
Pages
App2-
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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Article type: Appendix
Pages
App3-
Published: November 24, 2014
Released on J-STAGE: September 22, 2017
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