I describe the fundamental technologies concerning the single flux quantum (SFQ) logic circuits. Recent remarkable progress in the computer-aided-design (CAD) tool, which is based on the cell-based design technique, enables us to make SFQ integrated circuits. Although the circuit demonstrated so far has 2, 300 Josephson junctions at most, this number will increase because the CAD tool is advancing. The on-chip test system has also been developed to test the high-speed nature of the SFQ circuit. For example, the shift-register employed as a circuit under test operates correctly at 55GHz. I also describe the potential applications of the SFQ circuits. An analog-to-digital converter utilizing the high-speed nature and high sensitivity in the SFQ circuits will be applicable to the front end of the future base stations, which require broad band width, high sensitivity, and flexibility. Packet switches used in the future high-end router need high throughput and functionality. Only SFQ-based packet switches can meet these requirements. Another potential application is a high-end server. We have studied micro-architectures of a processor executing the Java Byte Codes directly and a multiprocessor system constructed by connecting the processors and memories via the ultra-broad-band SFQ network switches. Throughout the study, we employ the concept of the complexity-reduction (CORE), in which the high-speed nature of the SFQ circuits is used for the reduction of the circuit scale or simplification of the micro-architecture; the multiprocessor system has high performances. These clear applications promote rapid technological progress in the SFQ technology, though we must make every endeavor to find new application fields.
The historic story of the superconducting (SC) magnet for MHD ETL Mark V Facility (cf. Fig. 1 in Part I [Ref. 12]) is presented. This SC magnet was developed in the MHD Project (1966-75), which was one of the first MITI/AIST Large-Scale R & D Projects and the first national project for superconductor applications in Japan. This SC magnet had been the largest in Japan through 1982 when the Japanese LCT coil was made by JAERI. It was completed after many difficulties, some fatal and some trivial, because of a lack of knowledge, before it could generate maximum magnetic field 7 T with stored energy 65 MJ in 1973. Because technological problems had piled up and because no management know-how of national projects on technology development had been accumulated before then in the forefront of worldwide technological advances, “step by step” advances and “trial and error” attempts in the progress of the project had to be done over again. The paper is divided into three parts. Taking over Part I (Ref. 12) and II (Ref. 13), which described the processes of the design, manufacturing and the excitation test up to the design point (the central field B0=4.5T), Part III describes the challenging experiments to generate higher field (B0=4.7T), MHD power generation experiments and the project summary.
This paper describes an analytical study to review the hotspot temperature design criteria of the cable-in-conduit conductors for the ITER magnet system. The ITER magnet system uses three kinds of cable-in-conduit conductors for the Toroidal Filed (TF) coils, the Central Solenoid (CS) and the Poloidal Filed (PF) coils. The amount of copper in the superconducting cable has been defined by using the classical hotspot temperature design criteria that is based on the adiabatic condition. In the current design, ITER superconducting cables include a large amount of pure copper strands to satisfy the classical criteria. However, temperature and stress in the conduit and insulations after quench can be simulated with the quench simulation program and stress analysis program using the latest analysis tools. This analysis shows that the strand temperature is dominated by the conduction along strands and the heat capacity of other conductor materials and coolant. The hotspot temperature depends strongly on the delay time for quench detection. This analysis provides an estimation of delay times for quench detection. The thermal and stress analysis can provide the maximum allowable temperature after quench by determination of a failure or a functional disorder condition of the jacket material and turn insulation. In conclusion, it is found that the current density of the cable space can b