In this study, the relation between thermal conductivity of underfill and thermal resistance of micro bump layer in threedimensional stacked ICs was investigated. Thermal analysis model of stacked ICs with local heat source was created and thermal transient simulation was carried out. Thermal structure function of the model was calculated and thermal resistance of micro bump layer was evaluated. As a result, it was found that increase in thermal conductivity of underfill up to 6 W/m・K caused a rapid decrease in thermal resistance of micro bump layer. On the other hand, when thermal conductivity of underfill was larger than that value, thermal resistance of micro bump layer was almost stable.
The aim of this study is to investigate degradation behaviors of the adhesion strength of the Cu/resin (bisphenol F-type epoxy resin) interface in soaking under high humidity and high temperature conditions. Thermal humidity tests and highly-accelerated temperature and humidity stress tests (HAST) were conducted and the adhesion strength was investigated by a tensile test. An air-HAST was also conducted for a comparison. The fracture surface was analyzed by Fourier transform infrared spectroscopy (FTIR) to investigate the degradation mechanism of the adhesion strength. As a result, it was found that the adhesion strength decreases according to soaking and its degradation increases with increasing soaking temperature. Also, the degradation in the HAST is larger than that in the air-HAST. Degree of water absorption in the Cu/resin interface (Dw), which was defined by the results of FTIR analysis, tends to rapidly increase in early period of soaking and saturate afterwards. Even after absorbing water in the resin by soaking saturated, water infiltrating in the Cu/resin interface induced the formation of copper oxide and caused a further degradation of the adhesion strength. From the Arrhenius plot of the deterioration life of the adhesion strength which was determined by Dw, different tendencies were found in the regions before and after the glass transition temperature of the resin. Thus it was suggested that the life prediction equation for each region is required.
Currently, glass and low roughness organic materials are being studied as a base material for the assumed next generation high speed communication (5G).The surface roughening of the base material for enhancing the adhesion of the metal circuit deteriorates the electrical characteristics. Therefore, it is necessary to establish a metallization technology that does not roughen the surface of each base material. In this research, we focused on a method of obtaining a film having adhesion to a substrate by coating. It was confirmed that by coating silicone oligomer developed as a film forming material, it is possible to obtain a functional film having excellent catalytic performance for electroless plating and excellent adhesion performance.Furthermore, the heat resistance, stress and electrical characteristics of the silicone oligomer film were also confirmed and will be introduced in this paper.
Press-fit technology has been expected as one of mounting power modules on a printed circuit board (PCB). Since the power modules conduct a high current, resistances of contact portion and a pin itself are important to maintain stable temperature of the power modules and PCB. Also, an offset displacement of the pin and through of PCB should to be considered. Basic behavior of contact resistance and interface reaction were studied. A mixture layer between pin and through hole plating was formed by press-in process, and this process caused to remove an oxide film in order to obtain low contact resistance. Dispite the formation of the mixture layer, contact was not bonded metallically, therefore the function of the contact force is important. To apply pressfit technology to power modules, there are factors to reduce contact force which are the displacement by geometric tolerance and thermal cycle load between the pin and the through-hole of PCB. We solved the problem by designing constriction portion for the body part of press-fit pin, and clarified by thermal cycle test on power modules.
Because the power modules in next generation will be used under higher temperature, the delamination of the molding resin due to thermal stress is the problem to be solved. It is important to evaluate the reliability of the delamination between the molding resin and metallic components. We will provide the evaluation technique of the delamination strength of interfaces between molding resin and a metallic component. We measured the delamination toughness of interfacial cracks between copper/Al and molding resin for the wide range of temperature. We also analyzed stress and the stress intensity factors of critical cracks in a model power module during a thermal cycle test. We expected the most severe temperatures for the delamination of the interfaces under the thermal cycle test.
The mechanical strength of In-48mass%Sn eutectic solder has high variation because the microstructure is formed with nonuniformity structure during solidification process. In this paper, the effect of Ag addition for solidification process of In-48mass%Sn eutectic solder was investigated to suppress the variation of the strength. It was found that not only crystallization peak but also exothermic peak around 70 – 90℃ was detected in Differential Scanning Calorimetry (DSC) analysis. This peak was the transformation peak from non-equilibrium phase to equilibrium phase. And more, in this study, it was found the exothermic peak around 70 – 90℃ disappeared due to decreasing In concentration in liquid phase by adding Ag and a variation of the mechanical strength of InSn solder was suppressed by Ag addition.
The ultrafine line and space (L/S) for the advanced package is required to achieve high-density interconnection between chips. The productivity and insulation reliability are the key items for fine circuit layer below 2/2 μm. In this article, we propose the trench circuitry process using high resolution photoimageable dielectric to realize highly productive copper circuitry. The trench circuitry below 2/2 μm, even 1/1μm, was successfully demonstrated. For insulation reliability, we have studied two kinds of methods, one is the covering of exposed copper with barrier metal and the other is that with the highly insulation reliable organic material. The circuitry layer of 2/2 mm L/S, which is covered with a thin Ni layer by selective electroless plating, has passed the biased highly accelerated temperature and humidity stress test (biased-HAST) screening. We have studied the required material properties to obtain insulation reliable layer. The newly designed insulation barrier film (iBF) demonstrated high insulation reliability of 1/1 mm. Finally, we have studied the analysis method to quantify the insulation reliability and simulate the reliable L/S and the process compatibility.