Recent progress in two-dimensional doping profile measurements on silicon with scanning tunneling microscopy and spectroscopy (STM/STS) is presented. STM spectroscopy modes described are constant-current imaging, onset voltage profiling, vacuum-gap modulation spectroscopy and resonant-electron-tunneling spectroscopy with a marker molecule. These modes employ dependence of tunneling current on dopant type and concentration through the band bending induced by the metal STM tip at the surface. The combination of multiple spectroscopy modes and complimentary simulations makes the STM/STS as a powerful instrument for Si device characterization with the ability to observe the surface potential and location of individual dopant atoms on flat and electrically inert Si surfaces. Actual measurements are demonstrated for both the oxidized surfaces and the hydrogen-terminated Si(111) surface. Carrier concentration maps of small Si devices are shown. The mechanism of the measurements is discussed.

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  A conducting atomic force microscopy (C-AFM) in ultrahigh vacuum is used to directly observe the evolution of leakage path in HfO₂ gate dielectrics. Thanks to the UHV environment, reproducible results for both positive and negative tip biases are obtained without material formation on the surface, which has been a problem for atmospheric C-AFM. It is found that the density of leakage spots increases exponentially as a function of tip bias and that it is a large factor for leakage current increase. It is also found that these local leakage paths in HfO₂ films annihilate after applying a reverse tip bias. This process seems to be related to the initial stage of the forming process of resistive switching materials. The fact that these paths annihilate by a very small reverse bias suggests that this behavior is caused by local reduction and oxidation in the HfO₂ layer.

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  Scanning tunneling microscopy is used to study trap evolution in the Sc₂O₃/La₂O₃/SiO_x gates tack. Current-voltage characteristics extracted from leakage sites exhibit stress-induced-leakage-current (SILC) or barrier-height-lowering (BHL) behavior. The high-κ layer is observed to have larger intrinsic trap generation rate, compared to the SiO_x layer, due to a higher surface plasmon generated hot-hole current at the tip/high-κ interface. In the presence of electronic traps: (i) SILC traps near the cathode inhibit trap generation in the layer near the anode due to inelastic-trap-assisted-tunneling mechanism; (ii) SILC traps near the cathode may evolve into BHL as lattice displacement due to electron charging during the inelastic-trap-assisted tunneling process may accelerate the wear-out of the neighboring region; and (iii) traps with BHL characteristics in the high-κ may accelerate the breakdown of the Interfacial layer (IL) due to enhanced electric field in the IL. An electrical stress induced trap evolution model in the gate stack is proposed.

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  Scanning capacitance microscopy (SCM) techniques to investigate the local electronic properties of the ultra-thin films are presented. In the first part, we show the application of SCM experiments for the high-permittivity (high-k) dielectric thin films. The static capacitance (dC/dZ) images and spatially resolved dC/dZ versus sample bias spectra have revealed the charge distributions within high-k dielectrics. Moreover, the bias stress examination has clearly imaged the charge-trapped region in the high-k stacked dielectrics. In the second part, we have demonstrated that the conductance variation ascribed to the graphene thickness can be probed through SCM measurements. The UHF field transmitted from SCM probe tip induces a local accumulation of carriers just beneath the tip. This causes carrier diffusion over the effective biased area of S_eff on graphene films, which can be detected as the increment of dC/dZ signal intensity. These results indicate that our SCM technique provides a valuable method to explore the electronic characteristics of low-dimensional materials with nanoscale resolution.

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  Scanning capacitance microscopy (SCM) is a variation of atomic force microscopy (AFM) based techniques. SCM has been used to characterize two-dimensional electric properties in semiconductor devices, such as the free carrier distribution. We have demonstrated quantitative analysis of the estimated carrier concentration using statistically derived correlation functions with SCM signals. It was also applied to silicon carbide (SiC) materials as well as the conventional measurements for silicon devices. The statistical method does not require transforming the signals into physical quantities and is applicable to other next-generation AFM based techniques.

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