Three dimensional (3D) terahertz (THz) imaging or THz tomography has recently proven to be useful for non-destructive testing of industrial materials and structures. In place of previous imaging techniques such as THz pulse or continuous wave (CW) radar, we propose a THz optical coherence tomography (OCT) using frequency-swept THz sources, and demonstrate 3D imaging. In addition, we further apply this technique to the millimeter-wave region in order to extend applicable targets.

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Microwaves have typically been used for communications and radar, but nowadays are given much attention to energy transfer applications. This paper describes microwave power transfer from a satellite to Earth that is visualized as a solar power satellite system (SPSS). After the system configuration is explained, unique engineering features are presented. Then, some contributions made by Japanese community are introduced, focusing on microwave and antenna engineering. As SPSS will handle high power levels at microwave frequency, and so components should be mass-produced to reduce the cost, then we need to shift our paradigm on the technology involved. Finally, the roadmap to a commercial SPSS is discussed.

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This paper describes a small size broadband fractional-N RF synthesizer for an RF test module with a high throughput and multiple resources installed in RF Automated Test Equipment (ATE) systems. The core device is the PLL-LSI composed of the 13-band asymmetrical tournament form voltage-controlled oscillators (VCOs) and the proposed 48-bit ΔΣ modulator with the infinite impulse response (IIR) filter. The single-loop PLL RF synthesizer is constructed in the form of systems in package (SiP) including the PLL-LSI and the active loop filter. The RF synthesizer SiP features a small size of 20mm × 20mm × 3mm, a high frequency resolution of smaller than 50µHz, and a phase noise of better than -110dBc/Hz at offset frequency of 1MHz across a frequency range of 100MHz to 13.4GHz. In addition, a frequency settling time of 150 µs that is faster than our conventional dual-loop PLL synthesizers using the discrete VCOs or the YIG-tuned oscillators (YTOs) is achieved. The synthesizer SiP significantly contributes to the realization of small size, high throughput RF test modules for RF ATEs.

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The linearity analysis of a passive mixer is presented. The distortion mechanism caused by switching operation of a MOS transistor is elucidated from the static and dynamic analysis of passive mixers. Furthermore, the maximum input and output level to keep linear operation and its required bias conditions are expressed by simple equations. The maximum linear output amplitude of the passive mixer is determined only by the local signal amplitude and it does not depend on input and output impedance. The calculated linearity performances agree well with simulated and measured results.

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An S-band GaN on Si based 1kW-class SSPA system for space wireless applications is proposed. Since high-efficiency and high-reliability amplifier is one of the most important technologies for power and communication systems in a future space base station on a planet, compact, high-power, and high-efficiency SSPA is strongly requested instead of TWTA. Thus, we adopt GaN on Si based amplifier due to its remarkable material properties. At the beginning, thermal vacuum and radiation test of GaN on Si are conducted so as to confirm the space applicability. Fabricated SSPA system consists of eight 200W HPAs and coaxial waveguide power combiner. It achieves high efficiency such as 57% of drain efficiency and 87% of combining efficiency when RF output power achieves more than 60dBm. Furthermore, long-term stable operation and good phase noise characteristics are also confirmed.

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In the recently developed Flexible Wireless System (FWS), the same platform needs to deal with different wireless systems. This increases nonlinear distortion in its wideband power amplifier (PA) because the PA needs to concurrently amplify multi-band signals. By taking higher harmonics as well as inter- and cross-modulation distortion into consideration, we have developed a method to analytically evaluate the adjacent channel leakage power ratio (ACPR) and error vector magnitude (EVM) on the basis of the PA's nonlinear characteristics. We devise a novel method for modeling the PA amplifying dual-band signals. The method makes it possible to model it merely by performing a one-tone test, making use of the Volterra series expansion and the general Wiener model. We then use the Mehler formula to derive the closed-form expressions of the PA's output power spectral density (PSD), ACPR, and EVM. The derivations are based on the assumption that the transmitted signals are complex Gaussian distributed in orthogonal frequency division multiplexing (OFDM) transmission systems. We validate the method by comparing measurement and simulation results and confirm it can appropriately predict the ACPR and EVM performance of the nonlinear PA output with OFDM inputs. In short, the method enables correct modeling of a wideband PA that amplifies dual-band signals merely by conducting a one-tone test.

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Phase-nonreciprocal ε-negative and CRLH metamaterials are analyzed using a new approach in which field analysis and transmission line model are combined. The examined one-dimensional nonreciprocal metamaterials are composed of a ferrite-embedded microstrip line periodically loaded with shunt stubs. In the present approach, the phase constant nonreciprocity is analytically estimated and formulated under the assumption of operating frequency far above the ferromagnetic resonant frequency. The present approach gives a good explanation to the phenomenon in terms of ferromagnetic properties of the ferrite and asymmetric geometry of the metamaterial structure, showing a good agreement with numerical simulations and experiment.

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A two-dimensional negative refractive index material is proposed. The material has a bulky structure composed of dielectric prism cells with metal patterns. The material is expressed by an equivalent circuit. The propagation regions of two left-handed modes calculated from the equivalent circuit exist near the propagation regions obtained by electromagnetic simulation. It is confirmed by simulation that the incident plane wave goes into the material with low reflection by using the second left-handed mode and attaching metal conversion strips around the material. A negative refractive index slab lens with 15×9 cells is made to measure the field distribution of wave out of the lens. It is shown that the resolution of the slab lens exceeds the diffraction-limit.

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In terms of the transmission-line theory, a general synthesis of a new class of optimum Chebyshev-type ultra-wideband bandpass (UWB) filter prototype composed of multistage stepped-impedance resonators (SIRs) and two short-circuited shunt stubs positioned at input- and output- ports is presented. By the comparison of the real and theoretical transfer functions, the design/characteristic equations are obtained for the design of the proposed filter prototype rather than the traditional design tables. The explicit expressions of one-stage and two-stage filters are then derived and reported. Accordingly, bandpass filters with an arbitrary FBW (Fractional Bandwidth) and passband ripple can be easily designed by solving the design equations. As an example, a 10-degree Chebyshev distributed filter (two-stage filter) with an FBW of 110% is synthesized to meet FCC's outdoor mask. The synthesized circuit model are confirmed by a commercial circuit simulator and then optimized by an EM simulator, fabricated in microstrip line and characterized by the network analyzer. The good agreements between the measured and predicted frequency responses validate the effectiveness of newly proposed filter prototype and the corresponding synthesis technique. In addition, the designed filter exhibits good characteristics of comparatively low insertion loss, quite sharp skirt, very flat group delay and good stopband (especially in lower one) as well. It should be also highlighted that, compared with the conventional filters composed merely of parallel-coupled SIRs or shunt short-circuit-stubs, the new prototype can reduce the overall length of the filter by more than 3/4λ_g. Moreover, in terms of the presented design technique, the proposed filter prototype can be also used to easily realize the UWB filters with an FBW even greater than 110%.

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In this paper, a novel and simple one-port de-embedding technique has been applied to through-silicon-via (TSV) characterization and modeling. This method utilized pad, via, and line structures to extract the equivalent circuit model of TSV. The main advantage of this de-embedding method is that it can reduce the chip area to fabricate test element groups (TEGs) for measurements while keeping S-parameter measurement accuracies. We also analyzed the electrical characteristics of substrate coupling and TSV equivalent impedance. Our results shows good agreements between measurement data and the equivalent circuit model up to 20GHz.

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This paper investigates space and polarization multiplexing for multichannel transmission in a 120-GHz band wireless link system. The 120-GHz-band wireless equipment employs Cassegrain antennas with a gain of about 49dBi and cross-polar discrimination of 23dB. When each of two 120-GHz wireless links transmits a 10-Gbit/s data signal in the same direction over a distance of 800m, a bit error rate (BER) of below 10^-12 is obtained when the receivers are set 30m apart. When forward error correction and polarization multiplexing are used for each wireless link, we can set two wireless links within 1m of each other and obtain a BER below 10^-12. Moreover, we have experimentally shown that the rain attenuation of V- and H-polarization 120-GHz-band signal is almost the same.

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This paper presents an automatic gain control (AGC) system suitable for 60GHz direct conversion receivers. By using a two step gain control algorithm with high-pass filter cutoff frequency switching, the proposed AGC system realizes fast settling time and wide dynamic range simultaneously. The paper also discusses wide-bandwidth variable gain amplifier (VGA) design. By introducing digitally-controlled resistors and gain flattening capacitors, the proposed VGA realizes wide gain range while compensating gain variations due to parasitic capacitance of MOS switches. The AGC system is implemented in a transceiver chipset where RFIC and BBIC are fabricated in 90nm CMOS and 40nm CMOS respectively. The measurement shows excellent dynamic range of 47dB with +/-1dB gain accuracy within 1µs settling time, which satisfies the stringent requirements of the IEEE802.11ad standard.

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On-chip transmission lines are widely used in ultrahigh-frequency integrated circuits. One of the issues in modeling such transmission lines is that no reference impedance can be established on a chip. Conventionally, the parallel admittance Y_p has been adopted as a reference parameter for on-chip transmission lines instead of a reference characteristic impedance of 50Ω. In the case of CMOS processes, however, Y_p can have complicated characteristics in the short-millimeter-wave band owing to the frequency characteristics of the electric permittivity of low-k materials, which cannot be expressed using a simple circuit. To solve this problem, we propose the use of the series impedance Z_s as a reference parameter for transmission-line modeling since it basically can be determined from the geometrical dimensions and the frequency-stable permeability and resistivity. The parameters of transmission lines obtained by the proposed method were compared with those obtained by conventional methods using a 40nm CMOS process. By using the equivalent circuit model of Y_p along with RLC resonators, it is shown that the peaks of the frequency characteristics of Y_p can be used to explain the absorption spectrum of the dielectric. This suggests that the proposed method is suitable for CMOS short-millimeter-wave transmission lines.

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This paper presents a DC output voltage-boosting antenna with high input impedance in wide frequency band for RF (radio frequency) energy harvesting of FM broadcasting signals. Target input power level of -20dBm is used to design a loop antenna for DC output voltage-boosting. The RF energy harvesting on YNU campus provides 924mV DC output for a single rectenna and 1.72V DC output for twin rectennas by receiving several FM broadcasting wave simultaneously.

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In this paper, we propose a novel baseband (BB) phase shifter (PS) using a fixed-gain-amplifier (FGA) matrix. The proposed BB PS consists of 5 stages of a vector synthesis type FGA matrix with in-phase/quadrature-phase (I/Q) input/output interfaces. In order to achieve low gain variation between phase shift states, 3rd to 5th stages are designed to have a phase shift of +φ_i and -φ_i (i=3,4,5). To change between +φ_i and -φ_i phase shift states, two FGAs with DC bias in-phase/out-phase switches are used. The two FGAs have the same gain, therefore ideally no gain variation can be achieved. Using this configuration, phase shift error and gain variation caused by process mismatch and temperature variation can be reduced. Fabricated 5-bit BB PS has 3-dB bandwidth of 1.05GHz, root-mean-square (rms) phase errors lower than 2.2°, rms gain variations lower than 0.42dB. Power consumption of the PS core and output buffer are 4.9mW and 14.3mW, respectively. 1-dB compression output power is -12.5dBm. The fabricated PS shows that the total phase shift error and gain variation are within the required accuracy of a 5-bit PS with no requirement of calibration.

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Serial RapidIO (SRIO) is a high-performance interconnection standard for embedded systems. Cyclic Redundancy Check (CRC) provides protection for packet transmissions and impacts the device performances. In this paper, two CRC calculation strategies, based on adjustable slicing parallelization and simplified calculators, are proposed. In the first scheme, the temporary CRC result of the previous cycle (C_Pre) is considered as a dependent input for the new cycle and is combined with a specific segment of packet data before slicing parallelization. In the second scheme, which can reach a higher maximum working frequency, C_Pre is considered as an independent input and is separated from the calculation of packet data for further parallelization. Performance comparisons based on ASIC and FPGA implementations are demonstrated to show their effectiveness. Compared with the reference designs, more than 34.8% and 13.9% of average power can be improved by the two proposed schemes at 156.25MHz in 130nm technology, respectively.

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A predictive compact model of p-MOSFET negative bias temperature instability (NBTI) degradation for circuit simulation is reported with unified description of the interface-state-generation and hole-trapping mechanisms. It is found that the hole-trapping is responsible for the initial stage of the stress degradation, and the interface-state generation dominates the degradation afterwards, especially under high stress conditions. The predictive compact model with 8 parameters enables to reproduce the measurement results of the NBTI degradation under a wide range of stress bias conditions. Finally, the developed NBTI model is implemented into the compact MOSFET model HiSIM for circuit degradation simiulation.

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In this paper, a 24GHz transformer-coupled VCO is presented for a wide linear tuning range in the 0.13-µm CMOS process. The measured results of the proposed VCO show that the center frequency is 23.5GHz with 7.4% frequency tuning range. The output frequency curve has wide linear tuning region (5.5%) at the middle of the curve. Also, the VCO exhibits good phase noise of -110.23dBc/Hz at an offset frequency of 1 MHz. It has a compact chip size of 430 × 500µm². The VCO core DC power consumption is 5.4mW at 1.35V V_DD.

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This paper proposes a new double-edge-triggered implicitly level-converting flip-flop, suitable for a low-power and low-voltage design. The design employs a sense amplifier architecture to reduce the delay and power consumption. Experimentally, when implemented with a 130-nm, single-V_t and 0.84V V_DD process, it achieves 64% power-delay product (PDP) improvement, and moreover, 78% PDP improvement when implemented with a mixed-V_t technology, as compared to that of the classic double-edge-triggered flip-flop design.

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