There is a relentless push for cost and size reduction in optical transmitters and receivers for fiber-optic links. Monolithically integrated optical chips in InP and Si may be a way to leap ahead of this trend. We discuss uses of integration technology to accomplish various telecommunications functions.

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One of the most serious challenges facing the exponential performance growth in the information industry is a bandwidth bottleneck in inter-chip interconnects. We therefore propose a photonics-electronics convergence system with a silicon optical interposer. We examined integration between photonics and electronics and integration between light sources and silicon substrates, and we fabricated a conceptual model of the proposed system based on the results of those examinations. We also investigated the configurations and characteristics of optical components for the silicon optical interposer: silicon optical waveguides, silicon optical splitters, silicon optical modulators, germanium photodetectors, arrayed laser diodes, and spot-size converters. We then demonstrated the feasibility of the system by fabricating a high-density optical interposer by using silicon photonics integrated with these optical components on a single silicon substrate. As a result, we achieved error-free data transmission at 12.5Gbps and a high bandwidth density of 6.6Tbps/cm² with the optical interposer. We think that this technology will solve the bandwidth bottleneck problem.

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Research and development of a multi-degree colorless, directionless and contentionless reconfigurable optical add-drop multiplexer (CDC-ROADM) has recently been attracting a lot of attention. A large-scale transponder aggregator (TPA) is indispensable for providing high-capacity flexible connections to optical networks. In this paper, we report our study of the requirements for the TPA, which is a key technology for achieving flexible optical networks. To meet the requirements, we have developed an 8×48 TPA prototype based on Si photonics technology. This prototype was made with a few 8×8 Si optical switches and designed to be used with a commercial ROADM system. The 8×8 Si optical switches are made by integrating 152 Mach Zehnder (MZ) Thermo Optoelectronic (TO) 2×2 optical switch elements. A double gate structure is introduced to achieve the high extinction ratio (ER) required for optical communication. To the best of our knowledge, this is the world's first Si-TPA that can be used with a commercial ROADM system. By evaluating the basic optical characteristics utilizing real-time 100Gbps digital coherent detection as one of today's practical technologies and a 4.4THz spectral bandwidth 20Tbps super-channel with digital coherent detection, as a promising future technology, we have confirmed that our prototype Si-TPA has the potential for practical use and future extensibility.

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20-Gbps non return-to-zero (NRZ) — binary phase shift keying (BPSK) using the silicon Mach-Zehnder modulator is demonstrated and characterized. Measurement of a constellation diagram confirms successful modulation of 20-Gbps BPSK with the silicon modulator. Transmission performance is characterized in the measurement of bit-error-rate in accumulated dispersion range from -347ps/nm to +334ps/nm using SMF and a dispersion compensating fiber module. Optical signal-to-noise ratio required for bit-error-rate of 10^-3 is 10.1dB at back-to-back condition. It is 1.2-dB difference from simulated value. Obtained dispersion tolerance less than 2-dB power penalty for bit-error-rate of 10^-3 is -220ps/nm to +230ps/nm. The symmetric dispersion tolerance indicates chirp-free modulation. Frequency chirp inherent in the modulation mechanism of the silicon MZM is also discussed with the simulation. The effect caused by the frequency chirp is limited to 3% shift in the chromatic dispersion range of 2dB power penalty for BER 10^-3. The effect inherent in the silicon modulation mechanism is confirmed to be very limited and not to cause any significant degradation in the transmission performance.

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We have succeeded in demonstrating high-performance four-channel 25Gb/s integrated receiver for 100Gb/s Ethernet with a built-in spatial Demux optics and an integrated PD array. All components which configure to the Demux optics adhered to a prism. Because of the shaping accuracy for prism, the insertion loss was able to suppress to 0.8dB with small size. The connection point of the package for high speed electrical signals was improved to decrease the transmission loss. The small size of 12mm × 17mm × 7mm compact package with a side-wall electrical connector has been achieved, which is compatible with the assembly in CFP2 form-factor. We observed the sensitivity at average power of -12.1dBm and the power penalty of sensitivity due to the crosstalk of less than 0.1dB.

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By using impedance (Z) matching circuits in a low-cost transistor outline (TO) CAN package for a 10Gb/s transmitter, we achieve a cost-effective and small bidirectional optical subassembly (BOSA) with excellent optical transmission waveforms and a > 40% mask margin over a wide temperature range (-10 to 85°C). We describe a design for Z matching circuits and simulation results, and discuss the advantage of the cost-effective compensation technique.

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The 10-gigabit Ethernet passive optical network (10G-EPON) is a promising candidate for the next generation of fiber-to-the-home access systems. In the symmetric 10G-EPON system, the gigabit Ethernet passive optical network (GE-PON) and 10G-EPON will have to co-exist on the same optical network. For this purpose, an optical triplexer (10G-transmitter, 1G-transmitter, and 10G/1G-receiver) for optical line terminal (OLT) transceivers in 10G/1G co-existing EPON systems has been developed. Reducing the size and cost of the optical triplexer has been one of the largest issues in the effort to deploy 10G-EPON systems for practical use. In this paper, we describe a novel small and low-cost dual-rate optical triplexer for use in 10G-EPON applications. By reducing the optical path length by means of a light collection system with a low-magnification long-focus coupling lens, we have successfully miniaturized the optical triplexer for use in 10G-EPON OLT 10-gigabit small form factor pluggable (XFP) transceivers and decreased the number of lenses. A low-cost design of sub-assemblies also contributes to cost reduction. The triplexer's performance complies with IEEE 802.3av specifications.

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We have designed and fabricated a compact 4-array integrated SOA module using a novel parallel optical coupling scheme and polarization-insensitive built-in array isolators. We achieved ultra-high On/Off extinction ratio of more than 60dB and low cross talk of better than -60dB as well as high-isolation of over 47dB in wide wavelength ranges. We also developed a wavelength-insensitive parallel optical coupling scheme and an efficient thermal dissipating structure for a 4-array SOA module. We applied these technologies into 4-array SOA module fabrication and demonstrated a uniform optical coupling with the loss variance of 1dB over the 140-nm wavelength ranges. We also demonstrated simultaneous operation of 300mA × 4 channels with low thermal degradation of the module gain less than 1dB.

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We have investigated the operational performance of an optical serial-to-parallel conversion scheme using a phase-shifted preamble handling optical packets formatted by differential phase shift keying (DPSK) for integrated optical serial-to-parallel converter (OSPC). The same architecture for on-off keyed signals, based on a transmitter-side preamble at the top of the packet and phase-shifted by π/2, which is then -π/2 phase-biased with a Mach-Zehnder delay interferometer (MZDI), is available for binary and differential PSK signals. The delay length of these signals is determined by the relative timing positions of the gated bit and a balanced receiver-side photodetector. We simulated the operational performance of this scheme and its tolerance against the degree of modulation and optical chirp, with our results showing that a phase shift of more than 0.94π is required in order to attain a suppression ratio in the OSPC output consistent with a bit error rate of less than 10^-9 (based on the ratio of intensity of the extracted bit to the maximum peak intensity of the cancelled bits using a single-arm phase modulator). However, by using a Mach-Zehnder phase modulator, the modulation angle can be relaxed to about 0.36π. Experimental investigation of the OSPC showed that its functional tolerance with respect to the modulation angle agreed well with the simulated values. Finally, we performed optical label processing using the OSPC in conjunction with an address table, and our results confirmed the potential of the OSPC for use in label recognition.

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This paper presents symmetric and full swing designs of multiplier and full adder cells, based on weighted inputs for nanotechnology. Carbon Nanotube Field Effect Transistors (CNTFETs) are used to implement the circuits. Proposed designs are simulated using the HSPICE simulation tool and they are compared with their counterparts in terms of delay, power consumption and power-delay product. Significant improvements have been achieved at different voltage levels and different frequencies, load capacitors and temperatures have also been tested. Finally, process variation issue has been analyzed and the results have been reported.

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We propose a composite DCT basis line test signal to evaluate the video quality of a DTV encoder. The proposed composite test signal contains a frame index, a calibration square wave, and 7-field basis signals. The results show that the proposed method may be useful for an in-service video quality verifier, using an ordinary oscilloscope instead of special equipment.

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