The outline of CP-PACS, a massively parallel computer system (MIMD, distributed memory type) for research of computational physics, is presented. The development of CP-PACS, started in April 1992, aims to achieve more than 600 GFLOPS (peak speed) with 2048 processing units (PU) in 1996. One of the specific PU features of CP-PACS added to usual high-end RISC architecture is to support the PVP-SW (Pseudo Vector Processor based on Slide-Windowed registers). This feature can efficiently hide long memory access latency which comes from high miss-rate of cache on large scale applications. The other specific feature is 3 dimensional Hyper-Crossbar network (HXB). This network connects uniformly all PUs with short diameter, and realize high speed (more than 300 MB/sec) and flexible interconnection. The special high speed message passing protocol enables the system to transfer data more efficiently. The outlines of the support software are also presented.
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