FPGA-based radio-resource scheduler for 5G mobile in NFV environments

Abstract

A coordinated radio-resource scheduler with an FPGA-based hardware accelerator is a key component for 5G mobile systems in NFV environments. This paper analyses the scheduling process and addresses ways to reduce the overhead of memory copy operation between a central unit and the accelerator. The experimental results show that the overhead is reduced to approximately 14% when the accelerator is connected with a central unit via PCIe with high-bandwidth memory copy technique. Moreover, they indicate that the accelerator tightly coupled with central units via the Ethernet is also a possible approach for coordinated scheduling among multiple central units. This will be advantageous in implementing future NFV-based mobile communications systems.